So simulink keeps throwing the same error whenever I try to simulate or
compile something: "All Xilinx blocks must be contained in the same
hierarchy as a system generator block." Googling gives me solutions that
don't apply to me; same for the casper archive. The truly mysterious thing
is that I went back to a design that I made for the roach tutorial 1, which
I have not touched since, and even this now refuses to simulate or compile.
Any hot ideas?

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