That appears to have done the job. Thanks! Does the yellow configuring block just fail to do this or something? I'm pretty sure I properly updated our blockset to the latest git repository...
On Thu, Jul 29, 2010 at 1:33 PM, Mark Wagner <[email protected]>wrote: > Hi Jon, > > Try opening up the System Generator token and entering 'd7' into the clock > pin location. > > Mark > > > On Thu, Jul 29, 2010 at 10:27 AM, Jon Losh <[email protected]> wrote: > >> This tutorial .mdl that I'm using doesn't have any subsystems. Deleting >> and replacing the token didn't work, nor did the old trick of copying the >> contents into a new .mdl. >> >> >> On Thu, Jul 29, 2010 at 1:18 PM, John Ford <[email protected]> wrote: >> >>> > So simulink keeps throwing the same error whenever I try to simulate or >>> > compile something: "All Xilinx blocks must be contained in the same >>> > hierarchy as a system generator block." Googling gives me solutions >>> that >>> > don't apply to me; same for the casper archive. The truly mysterious >>> thing >>> > is that I went back to a design that I made for the roach tutorial 1, >>> > which >>> > I have not touched since, and even this now refuses to simulate or >>> > compile. >>> > Any hot ideas? >>> >>> Make sure all the subsystem windows are closed, and you have clicked in >>> the main window with the sysgen token. >>> >>> If that doesn't work, then delete the sysgen token and put it back. >>> >>> Otherwise, ??? >>> >>> John >>> >>> >>> > >>> >>> >>> >> >
