> Hi John, > > Just to clarify, do you mean 1 board with 16 outputs / cycle at half > the clock rate? I implemented this feature but I wouldn't recommend > using it for serious computation. For operations like FFT, speed is > not as much a problem as the number of simultaneous
Yes, that's what I meant. We're trying to test the board at 3 GS/s by collecting a long snapshot into DRAM, which doesn't run at 375 MHz, so we thought we'd just run it at the 2x demux into the dram interface. We can run the board at 1.5 GS/s with 8 outputs, but when we try the 16 output mode at 3 GS/s it doesn't seem to work right. So you would run the board at twice the clock rate and demux the output samples on the FPGA in the simulink model before writing into dram? Thanks for the info! John > > -Suraj > > On Sep 29, 2010, at 5:51 PM, John Ford wrote: > >> Hi all. >> >> Does anyone have a working example of using the adc083000 adc board >> in the >> 2* demultiplexed mode (16 simultaneous outputs). >> >> If so, what sampling rate? >> >> Thanks! >> >> John >> >> >> >
