Hi all, I've finally got around to testing out black boxing (and am very
excited), but have stumbled at the final hurdle. I've gotten through the
.ngc, .vhd and .m file creation/editing, and have added a pcore to my
design, but when I try and compile, I get this error message:
ERROR:NgdBuild:604 - logical block
'bbtest_XSG_core_config/bbtest_XSG_core_config/bbtest
_x0/bb_pfb_fft' with type 'pfb_fft_core' could not be resolved. A pin name
misspelling can cause this, a missing edif or ngc file, or the misspelling of
a type name. Symbol 'pfb_fft_core' is not supported in target 'virtex5'.
Which seems to suggest the .ngc file can't be found. The ngc file is,
however, successfully being copied over to
XPS_ROACH_base\pcores\pfb_fft_core.ngc. Any ideas?
Thanks
Danny
PS: version log below fyi (Windows XP SP3):
System Generator 10.1.3.1386 E:/Xilinx/DSP_Tools/common/bin/../../sysgen
AccelDSP 10.1.3.1386 E:/Xilinx/DSP_Tools/AccelDSP
Matlab 7.5.0.342 (R2007b) E:/Matlab
ISE 10.1.03i E:/Xilinx/ISE
On 25/11/2010 03:10, David MacMahon wrote:
The new Black Box Memo has been made an update to Memo 27. Here is the
abstract...
The CASPER toolflow uses Xilinx System Generator as its top level design entry
tool. This document describes how to use Xilinx System Generator’s Black Box
block to develop System Generator models (including CASPER based designs) more
efficiently using versions 10.1 and later of the toolflow.
You can see all of the CASPER memos on this page...
http://casper.berkeley.edu/wiki/Memos
Dave
