Hi Chao-Te
As for your 2nd point. I have updated the tut2.py script to fix the
programming issue.
Turns out when there is no boffile specified in the arguments, it passed an
empty string to the progdev function.'
An "svn update" should solve this issue now.
Regards
Wesley
On Tue, Feb 15, 2011 at 9:28 AM, Chao-Te Li <c...@asiaa.sinica.edu.tw>wrote:
> Hi everyone,
>
> I have been running the tutorials again. as for tut2,
> I found out some interesting things as follows -
>
> 1. I can run every command in tut2.py thru ipython except
> fpga.tap_start('tap0',rx_core_name,mac_base+dest_ip,dest_ip,fabric_port)
> and
>
> fpga.tap_start('tap3',tx_core_name,mac_base+source_ip,source_ip,fabric_port)
>
> I need to remove 'tap0' and 'tap3' for the commands to work. am I using
> an old version of tgtap? but I have updated the file system as described at
> http://www.mail-archive.com/casper@lists.berkeley.edu/msg01370.html
>
> 2. when running the python script (tut2.py), I can't get the device
> programmed. so I comment the command and program the device using katcp.
> and I need to modified the tap-start commands as well.
>
> 3. I found out I can't run tut2 consecutively, the 2nd time I always get
> something like TX overflow and TX almost full. is there a way to get around
> this problem? like clear the tx buffer? at the moment, I need to kill the
> process and re-program the device.
>
> does anyone have idea about these problems?
> Thanks a lot,
>
> Chao-Te
>
>
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> ---------- Original Message -----------
> From: casper-requ...@lists.berkeley.edu
> To: casper@lists.berkeley.edu
> Sent: Sun, 13 Feb 2011 12:55:44 -0800
> Subject: casper Digest, Vol 39, Issue 10
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> > Today's Topics:
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> > 1. 550MSa/sec 12-bit ADC test design (Peter McMahon)
> >
> > ----------------------------------------------------------------------
> >
> > Message: 1
> > Date: Sat, 12 Feb 2011 04:51:31 -0800
> > From: "Peter McMahon" <pe...@dotnet.za.net>
> > Subject: [casper] 550MSa/sec 12-bit ADC test design
> > To: <casper@lists.berkeley.edu>
> > Message-ID: <144101cbcab3$95977940$c0c66bc0$@za.net>
> > Content-Type: text/plain; charset="us-ascii"
> >
> > Hi everyone,
> >
> > Sorry to bother everyone again. I'm trying to get a 550MSa/sec 12-
> > bit ADC board to work with my ROACH. The data I'm getting out
> > doesn't make sense, so I'm in the process of figuring out which of
> > my board, design, data interpretation and/or wiring is faulty.
> >
> > To eliminate the possibility that my problems are caused by my
> > having done something really stupid in my design, I'd like to try
> > out a "known good" design. Does anyone have a test design for the 12-
> > bit ADC available that I could use? (I have an LX110 FPGA, so I'd
> > probably need to recompile it, rather than just use the existing
> > "binary".)
> >
> > Thanks,
> >
> > Peter
> >
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