Hi,
I'm working on getting the ADC83000x2 yellow block working with ROACH 2. I
found that there is some issue with the automatic translation of the legacy
DCM parameters specified by that block to the new MMCM, so I have made a new
version that explicitly invokes an MMCM. I have used the clock generator
wizard to determine the multipliers and divisors, and since the VCO
frequency range spans an octave (600 to 1200 MHz), the multiplier and
divisors will only be valid for an octave range of ADC clock input
frequencies. I have implemented settings that work for ADC inputs of 800 to
1600 MHz (corresponding to FPGA clocks of 200 to 400 MHz). However, if
someone wants to clock their design at a lower rate, different multipliers
and divisors will be needed. Is there an easy way to set this dynamically
based on the requested clock rate?
Glenn
