This is identical to what I developed too... Sorry to disappoint :-)
I know a fine handful of calibration techniques which correct for
gain/phase mismatches in a bulk manner (and don't require a calibration
source), but I don't think that many of them handle frequency-dependent
variations while not requiring a calibration source. The only one that
comes to mind and could be any good is this:
"GENERALIZED BLIND MISMATCH CORRECTION FOR TWO-CHANNEL TIME-INTERLEAVED
A-TO-D CONVERTERS"
A search on IEEE xplore should do it. I haven't had the time to figure
out everything it's saying (so busy lately), so that part's on you.
Also worth reading if you're going to try and solve this problem is:
"Explicit Analysis of Channel Mismatch Effects in Time-Interleaved ADC
Systems"
In my opinion, you should consider using the technique which Glenn
described, even if you don't have a calibration source. You won't be
able to remove all of the errors, but it'll be a far cry from nothing at
all. Also, the correction is dead simple: just perform an FFT as
usual, but at the end of the second-to-last stage of our DIT FFT, you
have the spectra from your two boards. Simply applying a gain and phase
correction to one of the two spectra is sufficient. Once you correct at
the final stage, you could back up one more stage to correct for the
four ADC cores. I haven't done the latter since in our application, the
interleave artifacts between the two cores on each 083000 chip falls
below the quantization noise floor.
In lab, this improves our SFDR by 17 dB. I should be able to give you
flight data in a month or two.
It's worth noting that when I tried to solve for the correction factors
analytically (off of raw ADC data), my corrections were off by a percent
or so. Doing a search for the minimum spurious result gave me much
better performance.
Cheers!
--Ryan
On 05/29/2012 08:25 AM, Jason Manley wrote:
One of my Bell Labs friends told me about a company (in Finland if I remember
correctly) which sells IP for FPGAs which breaks out the samples from the 4
cores and separately frequency compensates them before re-assembling the input
stream. The improvement for communications signals was only a few dB, however.
We have been in touch with Signal Processing Devices, a Swedish company that
does precisely what Glenn describes. Francois went to visit them and they tried
their IP on our existing ADCs (iADC in 2-way interleaved and KATADC in 4-way
interleaved). I've attached the results for your reference. We were a little
underwhelmed. You also need a calibration source to do this on-the-fly which
wasn't possible for us. The source data was a CW tone at various frequencies.
You can see the before/after plots.
I'm also interested to hear in any other techniques for doing this.
Jason
