Hi all My bad, I was thinking about receive, not transmit. Just got back from holiday so my brain is probably not in gear yet, my opologies.
Regards Andrew On Mon, 2012-06-11 at 08:29 +0200, Andrew Martens wrote: > Hi Laura > > Probably a silly question, but do you have "Enable Large Tx Frames" > enabled as a parameter option on the 10Ge core? The ~8000 data word > limit only applies when this option is chosen, otherwise it is a _lot_ > smaller. When buffer overflows happen, bad things occur, the 10Ge core > does not recover, no packets are sent, it must be reset. > > Regards > Andrew > > On Wed, 2012-05-30 at 10:54 +0200, Henno Kriel wrote: > > Hi Laura > > > > > > The 64 x 64b FIFO are switched in behind the 8KB FIFO, so this is > > actually fine. > > > > > > HK > > > > On Wed, May 30, 2012 at 8:29 AM, Henno Kriel <[email protected]> wrote: > > Hi Laura > > > > I had a look at the xco coregen file for TX Fifo when the > > "Enable Large Tx Frames" option is used (8K Packets). The size > > of the FIFO seems to be only 64 deep!? > > > > I will investigate further... > > > > HK > > > > > > On Wed, May 30, 2012 at 1:45 AM, Laura Vertatschitsch > > <[email protected]> wrote: > > Hey guys, > > > > > > I've got several designs where I consistently clock > > 512 64-bit samples into the ten gbe0 (v2 block) at a > > rate of ~14MHz. The fpga clock is running at 200. > > It's my understanding that I still should have some > > room to get faster data off. I went up by a factor of > > 2 (the only change in my design) to clock the data, > > still only 512 samples, at a new rate of ~28MHz. Not > > a single packet is sent, and the tx_afull and > > tx_overrun flags are consistently high. I was > > surprised by this, as I am only creating 4096Bytes in > > the frame and I know ~8000B is the limit. I've > > simulated in Simulink to be sure that the tx_valid and > > eof flags are being set when I want. > > > > > > Could there be something else going on here? Could > > the tx_overrun flag also be set in the event that the > > buffer cannot clear out the data before the next data > > point in? > > > > > > --Laura Vertatschitsch > > > > > > > > > > -- > > Henno Kriel > > > > DSP Engineer > > Digital Back End > > meerKAT > > > > SKA South Africa > > Third Floor > > The Park > > Park Road (off Alexandra Road) > > Pinelands > > 7405 > > Western Cape > > South Africa > > > > Latitude: -33.94329 (South); Longitude: 18.48945 (East). > > > > (p) +27 (0)21 506 7300 > > (p) +27 (0)21 506 7365 (direct) > > (f) +27 (0)21 506 7375 > > (m) +27 (0)84 504 5050 > > > > > > > > > > -- > > Henno Kriel > > > > DSP Engineer > > Digital Back End > > meerKAT > > > > SKA South Africa > > Third Floor > > The Park > > Park Road (off Alexandra Road) > > Pinelands > > 7405 > > Western Cape > > South Africa > > > > Latitude: -33.94329 (South); Longitude: 18.48945 (East). > > > > (p) +27 (0)21 506 7300 > > (p) +27 (0)21 506 7365 (direct) > > (f) +27 (0)21 506 7375 > > (m) +27 (0)84 504 5050 > > > >
