Hey

Henno made a fix for this (5bbf7282 at ska-sa github repo)

Unfortunately, we did a clean-up of our repo and moved files around a
while back so that trying to merge Henno's commit into casper-astro
throws an error :(

To make it work means making the changes we made, which removes support
for iBOBs and BEE2s (and changes a few other things). I (mostly
accidently) updated the casper-astro repo so that this happened but have
since reversed this as it will probably create a fair amount of
confusion. (We will have to think about this again closer to the casper
workshop)

So, we will have to redo Henno's mod, or use the ska-sa repo.

Cheers
Andrew


On Thu, 2013-01-31 at 20:35 +0200, Henno Kriel wrote:
> Hi Dave, Jack
> 
> The current ROACH2 QDR controller (gateware calibration) does not have
> an OPB bus and does not map to address space. As for the cal_fail &
> phy_ready flags: they are only available as ports and need to be read
> by a register in your design if needed.
> 
> If you tick the "include CPU interface" on your QDR yellow block, the
> "opb_qdr_sniffer" will be instantiated. This interface maps the QDR
> memory to OPB address space and the controllers sits at:
> 
> QDR0 : 7_0000
> QDR1:  8_0000
> QDR2:  9_0000
> QDR3:  A_0000
> 
> The actual QDR memory mapped space is then mapped at:
> 
> QDR0: 200_0000
> QDR1: 280_0000
> QDR2: 300_0000
> QDR3: 380_0000
> 
> However the core_info.tab (and the gen_mhs_ip.m for the Roach2 QDR
> controller) still has references to the deprecated QDR software
> calibrated controller (qdrX_ctrl) - I will remove these references as
> they are obsolete and only cause confusion.
> 
> Regards
> Henno
> 
> 
> 
> On Thu, Jan 31, 2013 at 7:24 PM, David MacMahon
> <[email protected]> wrote:
>         Hi, Jack,
>         
>         Thanks for your helpful reply!
>         
>         On Jan 31, 2013, at 2:01 AM, Jack Hickish wrote:
>         
>         > However, digging through the library, calibration flags
>         (cal_fail and phy_ready and a software qdr_reset) for the 4
>         QDR chips should be available in 0x7000, 0x8000, 0x9000,
>         0xA0000 (does one of these appear in the system.mhs you just
>         compiled?) -- which don't appear to go into core_info.tab
>         anywhere.
>         
>         
>         I do see an "opb_qdr_sniffer" instance in system.mhs that has
>         (among other details):
>         
>         PARAMETER C_CONFIG_BASEADDR = 0x000A_0000
>         PARAMETER C_CONFIG_HIGHADDR = 0x000A_FFFF
>         PARAMETER C_BASEADDR = 0x0380_0000
>         PARAMETER C_HIGHADDR = 0x03FF_FFFF
>         
>         so it does map a (64 KB!) config space to offset 0xA0000.
>         
>         > I expect these should be the addresses in core_info.tab
>         pointed to by qdr[X]_ctrl.
>         
>         
>         I suspect you're right.  The core_info.tab has:
>         
>         qdr3_memory         3  3800000  800000
>         qdr3_ctrl           3  60000    100
>         
>         The qdr3_memory at offset 0x3800000 matches the C_BASEADDR
>         from system.mhs, but it does seem that qdr3_ctrl in
>         core_info.tab should have an offset of 0xA0000 rather than
>         0x60000.  Similar changes should probably be made for all the
>         qdrX_ctrl lines in the ROACH2 core_info.tab file.
>         
>         Thanks again,
>         Dave
>         
>         
> 
> 
> 
> -- 
> Henno Kriel
> 
> DSP Engineer
> Digital Back End
> meerKAT
> 
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