Hi, Katty,

The white tags that you drew arrows to are Simulink "Goto" and "From" blocks.  
They are used as "virtual wires" to keep the diagram cleaner.  You can read 
about them in the Simulink on-line help, but basically, a signal drives a 
"Goto" block.  The Goto block is given a tag (e.g. "cnt_rst").  Then one or 
more "From" blocks can connect to that signal by selecting the same tag name.  
Tags can be local or global or "scoped".  These tag names are arbitrary (though 
it is highly recommended to make them meaningful!) and NOT exposed to the 
outside world (e.g. katcp).

What is exposed to the outside world are the names of the yellow blocks 
(software registers, GPIOs, Shared BRAMs, etc.).  In spect_2048channel.png, you 
can see that the software register yellow block is named "cnt_rst".  A slice of 
it (probably 1 bit) drives a Goto block with the "cnt_rst" tag.  In 
modeinterleave.png, there is a Goto block with "cnt_rst", but it is driven by a 
slice of software register yellow block named "control".  The "control" 
register is sliced in to multiple narrower signals.  By examining which bits of 
the control register serve which purpose (a little annotation from the model 
designer would have been nice), you can figure out how create (or adapt) 
software for this model.

Hope this helps,
Dave
 
On May 28, 2013, at 8:18 AM, katherine viviana cortes urbina wrote:

> Hi all,
> 
> I found a difference  the designs between spectrometer 2048 channel and 
> spectrometer 2048 channel mode interleave, this is block counter sys_rst for 
> example in the blocks acc_cntrl. I dont know how this sys_rst introduced
>  in my python code.
> 
> any ideas?
> 
> Cheers Katty
> 
> pd: you can to see attachments
> 
> 
> 2013/5/23 David MacMahon <[email protected]>
> Hi, Katty,
> 
> It sounds like you're making progress!
> 
> On May 23, 2013, at 2:03 PM, katherine viviana cortes urbina wrote:
> 
> > I was to working with the python  from the wiki. I adapt the tut3.py for 
> > the design "spectrometer with a stream at 2Gsps using ADC interleave mode" 
> > This design is made for Jason Manley and I only modifiqued same blocks for 
> > check up.
> 
> If there is a mismatch between python code and model file on the wiki, it 
> would be great to get it fixed.  If you're mixing and matching python scripts 
> and model files from various sources, then you will have to resolve any 
> compatibility issues.  That can actually be a good learning experience.  I 
> always say that you learn more when things don't work than when they do!
> 
> Dave
> 
> 
> <spect_2048channel.png><modeInterleave.png>


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