> > 2) Can multiple clock rates be set/used in the ROACH2 board? For example, > can we use the ADC clock for ADC captures and a (much) faster clock for the > data processing portion of the algorithm?
Most of the CASPER DSP blocks are designed to run synchronously with the ADC. So short of running your DSP at an integer multiple of the ADC, you wouldn't be able to do this. Andrew announced a new FFT core with async inputs at the CASPER workshop last month, and the async PFB is coming soon too. We've already got async VACCs and corner-turners (transpose) blocks, so I think most of the building blocks are now in place to do something like you describe, with the DSP and ADCs running at arbitrary rates. This enables you to use arbitrary sample rates, and even potentially run two ADCs on the same ROACH board at different rates. However, you still wouldn't save any hardware/DSP resources unless you ran your DSP at _double_ the rate (in which case you could halve your number of parallel paths). For most CASPER applications, it'd be a stretch to clock the FPGA that fast. Jason
