hello everyone, I'm working in a Speed Optimization in a couple of spectrometers implemented in the ROACH 1 with the FPGA Virtex-5 xc5vsx95tff1136-1, with 2 ADC083000 boards. These both spectrometers have a bandwidth of 500 MHz and 2048 channels each. I'm absolutely desperate to save as much RAM and logic as possible so I just want to leave the unscramble option unchecked, because with the actual design my compilations have an utilization of slices, slice registers and and LUT flip flops are extremely high - 90, 95, 99%. So i'm trying to cut my design down. Perhaps cut the number of channels from 2K to 1K, but is kind of not good lose spectral resolution. So another way is like Ashish Soni's idea:
http://www.mail-archive.com/[email protected]/msg04651.html So following this idea i'm trying to implement FFT unscrambler in software for FFT wideband real, I would like to know if there is a python script or the way to make a software unscrambler to save as much recourses as possible in my designs? Cheers! Andres Alvear Cabezon
