this will save you memory, but i don't think you are tight on memory.
i don't think it will save you much of other stuff....

dan



On Fri, Nov 29, 2013 at 6:26 PM, Andres Alvear <[email protected]>wrote:

> thank you Dan, I'm going to check it out and i'll do that tomorrow. Thanks
> again!
>
> Andres
>
>
> 2013/11/29 Dan Werthimer <[email protected]>
>
>>
>> Hi Andres,
>>
>> Below is link to software and documentation from Hong Chen
>> on how to unscramble  the FFT output in software
>> (saving resources in the FPGA by removing the FFT unscramble block):
>>
>>
>>
>> Hi Ashish, cc Dan,
>>
>> May I ask which unscramble block(s) would you like to remove? I'v only
>> tried removing the fft_unscrambler block and doing the unscrambling in
>> software. And the fft blocks in current Casper library has an option
>> "Unscramble Output" for adding/removing that block. As for the other
>> unscramble blocks such as bi_real_unscr_4x, I've never try that.
>>
>> What I did with doing unscrambling in software was basically do what the
>> unscrambler block would do to the output data streams - square transpose
>> and then reorder. I scratchsome quick 
>> notes<https://docs.google.com/document/d/13TU2CqZM3NziDy4LkQwGHzmg3azJlARHUGoPtQA80SU/edit?usp=sharing>
>>  on
>> this (google doc, page 5). A memo and some code I wrote back in Summer 2010
>> were linked at the end of the doc as well. I would attach a test model file
>> but it seems it doesn't open with current casper library (though being very
>> simple) and I'll make another one very soon.
>>
>> Please let me know if there's any question.
>>
>> Cheers,
>> Hong
>>
>>
>> On Fri, Nov 29, 2013 at 12:00 PM, Andres Alvear <[email protected]
>> > wrote:
>>
>>> hello everyone,
>>>
>>> I'm working in a Speed Optimization in a couple of spectrometers
>>> implemented in the ROACH 1 with the FPGA Virtex-5 xc5vsx95tff1136-1, with 2
>>> ADC083000 boards. These both spectrometers have a bandwidth of 500 MHz and
>>> 2048 channels each. I'm absolutely desperate to save as much RAM and logic
>>> as possible so I just want to leave the unscramble option unchecked,
>>> because with the actual design my compilations have an utilization of
>>> slices, slice registers and and LUT flip flops are extremely high - 90, 95,
>>> 99%. So i'm trying to cut my design down. Perhaps cut the number of
>>> channels from 2K to 1K, but is kind of not good lose spectral resolution.
>>> So another way is like Ashish Soni's idea:
>>>
>>> http://www.mail-archive.com/[email protected]/msg04651.html
>>>
>>> So following this idea i'm trying to implement FFT unscrambler in
>>> software for FFT wideband real,  I would like to know if there is a python
>>> script or the way to make a software unscrambler to save as much recourses
>>> as possible in my designs?
>>>
>>> Cheers!
>>>
>>> Andres Alvear Cabezon
>>>
>>
>>
>

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