Good day Adam I have been working through the documents you send me. I cant open the ISE IDE. As soon as I run the script I get the following error:
command not found I am new to Linux and Xilinx. Have a good day Heystek On Mon, Aug 8, 2016 at 3:31 PM, Adam Isaacson <aisaac...@ska.ac.za> wrote: > Hi Heystek, > > You mentioned that you were using the ROACH2 board. This contains a Virtex > 6 device. Vivado only works with Virtex 7 onwards. I would suggest if you > are going to target the ROACH 2 that you use Xilinx ISE 14.7. > > You will need to work with ISE 14.7 and not Vivado. We have just begun to > use Vivado for our Virtex 7 board e.g SKARAB. As far as I am aware, all > the the ROACH2 development in SKA-SA has been done using Xilinx ISE 14., as > it supports Virtex 6 devices. > > Kind Regards, > > Adam > > > > > > On Mon, Aug 8, 2016 at 3:13 PM, Heystek Grobler <heystekgrob...@gmail.com> > wrote: > >> Good day Adam >> >> I am using Ubuntu 14.04 LTS with MATLAB 2012B. Im using the Vivado suite >> that came with a Zed-Board (Vivado 2013.4). >> >> The error I am receiving from MATLAB at startup is: >> Undefined function 'lAddSysgen' for input arguments of type 'char'. >> > In matlabrc at 205 >> >> The errors I get from the system generator is: >> 1. Design Error - Default block diagram >> 2. Block Error - AddSub >> >> These errors occurs with the first tutorial from CASPER. >> >> I looked at the "tweaks to compile" but everything seems ok. >> >> I will use the guides you have attached in the previous email. >> >> I appreciate your help!! >> >> Heystek >> >> On Mon, Aug 8, 2016 at 2:30 PM, Adam Isaacson <aisaac...@ska.ac.za> >> wrote: >> >>> Apologies, that should of been Ubuntu 14.04 LTS and Matlab R2015b... >>> >>> On Mon, Aug 8, 2016 at 2:28 PM, Adam Isaacson <aisaac...@ska.ac.za> >>> wrote: >>> >>>> Hi Heystek, >>>> >>>> What OS are you using? I am using Ubuntu 4.04 LTS. What repo are you >>>> using? I am using https://github.com/ska-sa/mlib_devel. What version >>>> of Matlab and Xilinx are you using? I am using Matlab R2012b and R2105b. I >>>> am using Xilinx ISE 14.7. I wrote these How To docs which may or may not >>>> come in handy. >>>> >>>> 1) Matlab 2012b and 2015b Installation: >>>> https://drive.google.com/open?id=18BBkoWlSGeuK8BV1UlSnRJIYzl >>>> OEWUhqTlF_zAePTj0 >>>> >>>> 2) Xilinx ISE 14.7 Installation: >>>> https://drive.google.com/open?id=1o7Wl7wzB7VE1Cckk60B35WerJv >>>> l5crXa7Q5xbcoYgE0 >>>> >>>> This should be read in conjunction with the CASPER wiki page - >>>> https://casper.berkeley.edu/wiki/MSSGE_Setup_with_Xilinx_1 >>>> 4.x_and_Matlab_2012b - did you follow "tweaks to be able to compile"? >>>> >>>> Kind Regards, >>>> >>>> Adam >>>> >>>> >>>> >>>> >>>> On Mon, Aug 8, 2016 at 1:53 PM, Heystek Grobler < >>>> heystekgrob...@gmail.com> wrote: >>>> >>>>> Good Day >>>>> >>>>> My name is Heystek Grobler. I am an electrical en electronic >>>>> engineering science student and for my final year project (skripsie) I'm >>>>> developing a wideband spectrometer on a ROACH-2 board. >>>>> >>>>> Currently I have a problem with Xilinx System Generator and MATLAB. >>>>> The Simulink Model runs as a simulation but as soon as I run it in Xilinx >>>>> System Generator to compile it for the board it crashes and gives a >>>>> "design >>>>> error" as and "block error". >>>>> >>>>> I was hoping that if possible, that you could provide me with >>>>> assistance to get Xilinx and Simulink up and running. So far I followed >>>>> the >>>>> CASPER tutorials but got stuck with this problem/ >>>>> >>>>> I hope to hear from you soon. >>>>> >>>>> Have a wonderful day >>>>> >>>> >>>> >>>> >>>> -- >>>> >>>> Adam Isaacson >>>> >>>> DBE: FPGA Engineer >>>> >>>> SKA-SA >>>> >>>> 3rd Floor >>>> >>>> The Park >>>> >>>> Park Road >>>> >>>> Pinelands >>>> >>>> 7405 >>>> >>>> >>>> Tel: +27215067300 (W) >>>> >>>> Fax: +27215067375 (W) >>>> >>>> Cell: +27825639602 >>>> >>> >>> >>> >>> -- >>> >>> Adam Isaacson >>> >>> DBE: FPGA Engineer >>> >>> SKA-SA >>> >>> 3rd Floor >>> >>> The Park >>> >>> Park Road >>> >>> Pinelands >>> >>> 7405 >>> >>> >>> Tel: +27215067300 (W) >>> >>> Fax: +27215067375 (W) >>> >>> Cell: +27825639602 >>> >> >> > > > -- > > Adam Isaacson > > DBE: FPGA Engineer > > SKA-SA > > 3rd Floor > > The Park > > Park Road > > Pinelands > > 7405 > > > Tel: +27215067300 (W) > > Fax: +27215067375 (W) > > Cell: +27825639602 >
