Dear All, We have a ROACH2-rev2 with an ADC5G Demux1. We are using it to capture biomedical images with the ADC clock running as the system clock. However somehow we need another signal from aux_clk input to act as a clock signal for a small part of the design. Could you let us know how we can do that in the simulink design flow?
Thank you very much for your help and answering our question. Cheers, Ho-Cheung NG Research Assistant HKU-CASR, Department of Electrical and Electronic Engineering The University of Hong Kong Pokfulam, Hong Kong
