Hi Pei Xin, To me that mlib_devel looks like it should be fine, but let me know how you get on with the library / code in that github link I sent.
Cheers Jack On Wed, 17 Oct 2018 at 01:10 [email protected] <[email protected]> wrote: > Attach is the git log file from mlib_devel , and I didn't configure the > ADC in python script. > Thanks for your recommand, I'll try the new library. > > ------------------------------ > > ========================================== > 裴鑫 (Xin Pei) > 中国科学院新疆天文台 > Xinjiang Astronomical Observatory, CAS > 新疆乌鲁木齐市科学一街150号 > <https://maps.google.com/?q=%E7%A7%91%E5%AD%A6%E4%B8%80%E8%A1%97150%E5%8F%B7&entry=gmail&source=g> > (邮编: 830011) > 150, Science 1-Street > Urumqi, Xinjiang 830011 > China > 电话(Tel): +86-(0)991-3689471 <+86%20991%20368%209471> > 传真(Fax): +86-(0)991-3838628 <+86%20991%20383%208628> > ========================================== > > > *From:* Jack Hickish <[email protected]> > *Date:* 2018-10-17 09:37 > *To:* [email protected] > *CC:* casper <[email protected]> > *Subject:* Re: Re: [CASS SPAM]Re: [casper] ADC5G on SNAP > > Hi Pei Xin, > > What mlib_devel library are you using? > > Are you using any python code to configure your ADC after programming the > FPGA? > > Cheers > Jack > > On Mon, 15 Oct 2018 at 23:08 [email protected] <[email protected]> wrote: > >> Hi Jack, >> >> The ADC / clock is definitely working, I tried 2 different clocks, one >> is from Valon and another one is from a signal generator. >> I tested with two ADC5G cards, and the returned value from the library >> either casperfpga (estimate_fpga_clock()) or corr (est_brd_clk() ) are >> both 0.0. >> Attach is an photo of SNAP board, any switches is wrong in here? Can you >> check it? >> >> The board is working well with internal ADCs. >> >> Best wishes, >> Pei Xin >> ------------------------------ >> >> ========================================== >> 裴鑫 (Xin Pei) >> 中国科学院新疆天文台 >> Xinjiang Astronomical Observatory, CAS >> 新疆乌鲁木齐市科学一街150号 >> <https://maps.google.com/?q=%E7%A7%91%E5%AD%A6%E4%B8%80%E8%A1%97150%E5%8F%B7&entry=gmail&source=g> >> (邮编: 830011) >> 150, Science 1-Street >> Urumqi, Xinjiang 830011 >> China >> 电话(Tel): +86-(0)991-3689471 <+86%20991%20368%209471> >> 传真(Fax): +86-(0)991-3838628 <+86%20991%20383%208628> >> ========================================== >> >> >> *From:* Jack Hickish <[email protected]> >> *Date:* 2018-10-09 21:26 >> *To:* [email protected] >> *CC:* casper <[email protected]> >> *Subject:* Re: [CASS SPAM]Re: [casper] ADC5G on SNAP >> >> Hi Peix Xin, >> >> That all should be ok. Are you able to confirm that the ADC / clock are >> definitely working using a Roach2? >> >> Cheers >> Jack >> >> On Mon, 8 Oct 2018, 9:11 pm [email protected], <[email protected]> wrote: >> >>> Hi Jack, >>> >>> Our ADC card is a Demux 1:1 version, see attachment 1. Will this be the >>> problem? >>> And the mlib_devel is the same one we used for Crab design. >>> >>> The ADC yellow block and MSSGE block settings see attach 2 and 3 . >>> >>> The clock signal is from Valon 5008 and inject to the Clock SMA >>> connector of ADC. >>> >>> Best wishes, >>> Pei Xin >>> >>> >>> *From:* Jack Hickish <[email protected]> >>> *Date:* 2018-10-08 22:19 >>> *To:* casper <[email protected]> >>> *Subject:* [CASS SPAM]Re: [casper] ADC5G on SNAP >>> >>> Hi Peix Xin, >>> >>> That should work. What mlib_devel are you using? >>> Is your ADC card a demux 1 version? >>> >>> What ADC yellow block settings? >>> What snap MSSGE block settings (should be clocking from adc0_clk) >>> >>> Are you applying a clock to the ADC card - you can't use the on-board >>> synthesiser with an external ADC. >>> >>> Cheers >>> Jack >>> >>> On Mon, 8 Oct 2018, 6:38 am [email protected], <[email protected]> wrote: >>> >>>> Hi Jack, >>>> >>>> We want use ADC5G card on SNAP board, is there any setting to switch on >>>> ZDOK connector? >>>> The programming is done, however, it returnned 0.0 when we try >>>> fpga.est_brd_clk() >>>> to check the FPGA's clock. >>>> >>>> Best wishes, >>>> Pei Xin >>>> >>>> ------------------------------ >>>> >>>> ========================================== >>>> 裴鑫 (Xin Pei) >>>> 中国科学院新疆天文台 >>>> Xinjiang Astronomical Observatory, CAS >>>> 新疆乌鲁木齐市科学一街150号 >>>> <https://maps.google.com/?q=%E7%A7%91%E5%AD%A6%E4%B8%80%E8%A1%97150%E5%8F%B7&entry=gmail&source=g> >>>> (邮编: 830011) >>>> 150, Science 1-Street >>>> Urumqi, Xinjiang 830011 >>>> China >>>> 电话(Tel): +86-(0)991-3689471 <+86%20991%20368%209471> >>>> 传真(Fax): +86-(0)991-3838628 <+86%20991%20383%208628> >>>> ========================================== >>>> >>>> -- >>>> You received this message because you are subscribed to the Google >>>> Groups "[email protected]" group. >>>> To unsubscribe from this group and stop receiving emails from it, send >>>> an email to [email protected]. >>>> To post to this group, send email to [email protected]. >>>> >>> -- >>> You received this message because you are subscribed to the Google >>> Groups "[email protected]" group. >>> To unsubscribe from this group and stop receiving emails from it, send >>> an email to [email protected]. >>> To post to this group, send email to [email protected]. >>> >>> -- > You received this message because you are subscribed to the Google Groups " > [email protected]" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > To post to this group, send email to [email protected]. > -- You received this message because you are subscribed to the Google Groups "[email protected]" group. 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