Hi Xavier,

The only yellow block info you'll find is by looking at the code. When
configured properly for a given mode, the block doesn't time multiplex
multiple ADC channels, it does what you expected it to do. I just
checked the init code we use for HERA, and it's pretty much the same
as you, though we use inputs 1 and 3 (adc.selectInput([1,1,3,3]). I'm
not sure if this is significant (I don't think it should be).
What version of casperfpga are you using?
Cheers
Jack

On Wed, 4 Sep 2019 at 09:18, Xavier Bosch <[email protected]> wrote:
>
> Hi all,
>
> I been using SNAP board (a regular-standard board) for a while now in a 3-ADC 
> @ 800 MHz configuration mode. I would like to use it in  a 6-ADC @ 500 MHz 
> configuration mode and I am having some trouble understanding what is going 
> on. I read the HMCAD1511 datasheet.
>
> ADC configuration with [1,1,2,2] (see the whole ADC calibration function at 
> the end of this email)
>
> I connected  a snap block  (dataloggers) to the yellow-block (snap_adc) to 
> record time series of the collected data. What I see is that  ADC0 and ADC1 
> outputs are not spitted between a0 and a1 (yellow block) and a2 and a2, 
> respectively.
> Instead, what I find is that they are time multiplexed, ie. at t0 I have that 
> ADC0 is at a0, a1, a2 and a4, and at t1 I have ADC1 at  a0, a1, a2 and a4
>
> See attached picture of 8 consecutive samples of a0, a1, a2 and a3 with only 
> ADC0 connected (figure ADC0_ch0) and then ADC0 and ADC1 connected  
> (Figure_ch0_ch1), ie. First row is t0, second row is t1)
>
> The  HMCAD1511 datasheet does not show a time multiplexed output but a 
> parallel output. I do not know how the yellow block is implemented. Where I 
> could find more information about the yellow block implementation?
> Is that the expected yellow block output? If the yellow block time 
> multiplexes the ADC0 and ADC1 then how do you synchronize the channels with 
> the rest of the design?
>
>
> code that I use to configure/calibrate the ADCs
>
> def init_adc(self):
>
> self.sample_rate=500
>
> adc = casperfpga.snapadc.SNAPADC(self.fpga,ref=50)
>
> if adc.init(self.sample_rate, numChannel=2,resolution=8) == 0:
>
> print "ADC calibrated! "
>
> else:
>
> print "ERROR ->>> ADC NOT calibrated! "
> sys.exit(0)
>
> #adc.selectADC(0)
>
> adc.adc.selectInput([1,1,2,2])
>
>
>
> Best,
>
> XB
>
>
>
>
>
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