You’re welcome, Sebastian. In addition to what Dan said, it could also be that the overflow is happening earlier, in the decimation filters. If the overflow issue is there, or possibly also if the issue is in the very first stage of the FFT, then FFT shifter settings won’t fix the overflow. (It depends on the precise design of the FFT, of which I’m unaware, but it would be usual to have this possible issue in the first FFT stage as well as the decimation filters.)
In this case where the shifters don’t fix it, your remaining options to prevent overflow would be a slight reduction in input amplitude, or an increase in the number of data bits through the decimation filters and/or the FFT. Keep in mind that you can’t set the amplitude and shifters to settings that just barely work and expect it to work in a fielded application. If it is too close to overflow, then you can expect random noise will cause it to overflow occasionally and cause exactly the degradation that you’ve been seeing. To prevent this, you need to build in some margin against noise fluctuations (or other uncontrollable variations) by reducing the normal amplitude to a good bit below full scale. This *will* eat into your dynamic range, but there’s not much that can be done about that. If you don’t continuously pay some dynamic range to make overflows highly unlikely, then you pay instead as the occasional overflows reduce your dynamic range intermittently. If you need more dynamic range against overflow, you can always increase the number of data bits. This would allow you to have enough margin to prevent overflows and still have the dynamic range that you desire left over. I’m not sure what is constraining you from increasing the number of data bits. (Note: For overflow considerations, only the data bits need to be increased. For other types of dynamic range considerations, you typically also need to increase the bit width of FFT constants and filter constants. Fortunately, this doesn’t need to be done in this overflow-prevention case.) If you really can’t get the dynamic range that you need, or if it causes other problems such as too many FPGA resources used, send me a note. I don’t expect that will be the case, but if it is I have other (non-free) options that may work, depending on the precise details of your system. Regards, Ross [email protected] > On Sep 11, 2019, at 6:44 PM, Dan Werthimer <[email protected]> wrote: > > > hi sabastian, > > what are your FFT settings? > if you are processing a pure sine wave the signal will grow by a factor of > two every stage > (there are log2N stages - so if your spectrometer produces 1024 channels, it > will have 10 stages). > > if you are starting the FFT by injecting your ADC at the most significant > bits, > (eg: an 8 bit adc is input into the 8 MSB's of an18 bit FFT), > then you need to downshift every stage (set shifter setting to FFFF). > > best wishes, > > dan > > > > > Dan Werthimer > Marilyn and Watson Alberts Chair > Astronomy Dept and Space Sciences Lab > University of California, Berkeley > > > On Wed, Sep 11, 2019 at 8:05 PM Sebastian Antonio Jorquera Tapia > <[email protected] <mailto:[email protected]>> > wrote: > That makes total sense, because when I drop the signal to lower values the > behaviour disappear but this again reduce my available dynamic range :( > I'm going to check every stage looking where the system saturates. > Thanks for the idea! > > > El vie., 6 sept. 2019 a las 0:43, Ross Martin (<[email protected] > <mailto:[email protected]>>) escribió: > Sebastian, > > It looks like maybe you're using a channelizer size of around 1000. For a > 1000-point channelizer, if you have one sample that overflows in the > channelizer filter, that will act like a source of impulse noise, which is a > constant function across all spectral bins. Furthermore, the amplitude of > the impulse could be approximately full scale, but in only a single sample. > In that case its average power would be about 1/1000. When this power is put > into the spectral domain it's spread evenly across all 1000 frequencies, and > the power in a single frequency bin is approximately 1/1000/1000. That's > about -60dB, which is close to the error level you're seeing. > > So I'll bet your problem is overflow. If so, reducing the amplitude of your > sine wave by a factor of 4 should certainly fix it. A factor of 2 will also > probably work. > > Ross > [email protected] <mailto:[email protected]> > > > On Wed, Sep 4, 2019, 10:52 AM Dan Werthimer <[email protected] > <mailto:[email protected]>> wrote: > > the snr increases with sqr(number of samples added), > and that increase can be from decimation or adding spectra together > (integration), or better yet, both. > but if you don't have noise, the quantization and interleave spurs will not > improve with sqr(Nsamples). > > best wishes, > > dan > > > On Wed, Sep 4, 2019 at 12:47 PM Sebastian Antonio Jorquera Tapia > <[email protected] <mailto:[email protected]>> > wrote: > One question, at my understanding if I use a filter to decimate I'm ,in a > certain way, adding all the samples using the filter for the decimation, like > averaging with the appropriate weights for one frequency range. So the > decimation filter should interpret the same role as the accumulation you > mention. > > Aside from that, I have a throughput requirement so I can't add a lot of > samples... The dithering you mention only works with a proper accumulation > right? because I tried to add noise to my system and didn't see a difference. > > > El mié., 4 sept. 2019 a las 14:14, Dan Werthimer (<[email protected] > <mailto:[email protected]>>) escribió: > > you can get extremely high SNR if you add noise to your sine wave signal. > and then integrate many spectra together to beat down the noise. > to get rid of ADC quantization noise and other spurs, > you should have noise at least at the one LSB level, better if you have two > LSB's of noise. > then you can get 150 dB SNR if you add enough spectra together. > > dan > > > Dan Werthimer > Marilyn and Watson Alberts Chair > Astronomy Dept and Space Sciences Lab > University of California, Berkeley > > > On Wed, Sep 4, 2019 at 10:39 AM Sebastian Antonio Jorquera Tapia > <[email protected] <mailto:[email protected]>> > wrote: > Hi casperites, > I have been working in project that needs a high SNR In order to achieve that > I made a model with 3 decimation steps with factors 16, 8 and 4, to zooming > the frequency range [50.625, 52.730]MHz and then put the PFB-FFT combo. > The system achieve 100dB of SNR for inputs with the same frequencies of the > FFT twiddle factors, but outside those frequencies the noise floor goes up > 50dB in the worst cases, which is when the signal is between two bins. > I am using the 8 bit aasia ADC, so the SNR without any further processing > should de 48 dB approx, so in the bad cases we loose the improvement due > decimation. > I attached the pictures of the response in the best and in the worst case. > > There is a limitation in the amount of decimation that one could make tho > improve the SNR?? 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