Thanks Adam.

I removed all the casper installs as per your instructions and reinstalled
casperfpga. I still get the similar error as before. And the version is
also showing up as unknown.

So I removed the packages in /usr/local/.. as you said, downloaded all the
files in the location you had suggested, cd'ed in to the new folder and
installed casperfpga as mentioned in the tutorial. I am able to connect to
the red pitaya board, the led is blinking and everything, but get the
similar error as before when reading the snapshot.

On Wed, Apr 8, 2020 at 3:00 PM Adam Isaacson <aisaac...@ska.ac.za> wrote:

> Hi Aravind,
>
> You can remove all casperfpga installs by doing the following:
>
> 1) cd /usr/local/lib/python2.7/dist-packages
> 2) sudo rm - rf casper*
>
> This will remove all casperfpga installs.
>
> The version of casperfpga you read back didn't look right to me. It should
> not be unknown. Once you install the link I sent you, you should read back
> the branch and githash, I think.
>
> I will look at these files tomorrow.
>
> Kind regards,
>
> Adam
>
> On Wed, 08 Apr 2020, 8:06 PM Aravind Venkitasubramony, <
> aravind.venkitasubram...@colorado.edu> wrote:
>
>> The version returned by is '0.0+unknown.202004081054'.
>>
>> Attached are the fpg and the py files.
>>
>> I tried to uninstall casperfpga and reinstall from the version you had
>> provided. But now I get an error while running ipython and typing
>> casperfpga in the terminal
>>
>> NameError                                 Traceback (most recent call
>> last)
>> <ipython-input-1-1bde13f56e4f> in <module>()
>> ----> 1 casperfpga
>>
>> NameError: name 'casperfpga' is not defined
>>
>> I am afraid if I have messed up the casperfpga installation. Is there a
>> way to clean up all the casperfpga related files and install afresh?
>>
>>
>>
>> On Wed, Apr 8, 2020 at 12:58 AM Adam Isaacson <aisaac...@ska.ac.za>
>> wrote:
>>
>>> Dear Aravind,
>>>
>>> The slx file looks correct. This issue does look familiar to me - we
>>> used to have an issue with the snap shot byte ordering. I am wondering what
>>> version of casperfpga you are using? Please do the following in your
>>> terminal:
>>>
>>> 1) ipython
>>> 2) import casperfpga
>>> 3) casperfpga.__version__
>>>
>>> Let me know what version you read back.
>>>
>>> I suspect you are using an old version of casperfpga with this bug. Try
>>> using the following version of casperfpga:
>>>
>>> https://github.com/ska-sa/casperfpga/tree/devel
>>>
>>> Please also send me your python modified test scripts and fpg generated
>>> file for 14 bits, thanks.
>>>
>>> Kind regards,
>>>
>>> Adam Isaacson
>>> South African Radio Astronomy Observatory (SARAO)
>>> Hardware Manager
>>> Cell: (+27) 825639602
>>> Tel:  (+27) 215067300
>>> email: aisaac...@ska.ac.za
>>>
>>>
>>>
>>> On Tue, Apr 7, 2020 at 8:30 PM Aravind Venkitasubramony <
>>> aravind.venkitasubram...@colorado.edu> wrote:
>>>
>>>> Thanks Adam!
>>>>
>>>> That was quite helpful. I was able to find the compiled slx files from
>>>> the repository and comparing the two models definitely helped answer a lot
>>>> of 101 level doubts.
>>>>
>>>> I only have the 14 bit RP board with me and I made the edits in the
>>>> blocks as far as I understood from the tutorial. Since there were two
>>>> separate yaml files for the 10 and 14 bit boards, I believe I did not have
>>>> to make any changes there. The compile also went through without any issues
>>>> and generated the fpg file. But when I run the python, I get the following
>>>> error message
>>>>
>>>> connecting to the Red Pitaya...
>>>> done
>>>> programming the Red Pitaya...
>>>> done
>>>> arming snapshot block...
>>>> done
>>>> triggering the snapshot and reset the counters...
>>>> done
>>>> reading the snapshot...
>>>> Traceback (most recent call last):
>>>>   File "tut_adc_dac.py", line 54, in <module>
>>>>     adc_in = rp.snapshots.adc_in_snap_ss.read(arm=False)['data']
>>>>   File "/usr/local/lib/python2.7/dist-packages/casperfpga/snap.py",
>>>> line 227, in read
>>>>     rawdata, rawtime = self.read_raw(**kwargs)
>>>>   File "/usr/local/lib/python2.7/dist-packages/casperfpga/snap.py",
>>>> line 333, in read_raw
>>>>     bram_dmp['length'] / (self.width_bits / 8)))
>>>> RuntimeError: adc_in_snap_ss.read_uint() - expected 4096 bytes, got 32
>>>>
>>>>
>>>> The line 227 in the snap.py mentioned here addresses something specific
>>>> to Red Pitaya as seen from the comments in the snap.py file and I did not
>>>> follow what it was.
>>>>
>>>> This was the same error I got in the tutorial 3 as well in the
>>>> spectrometer case. Since there is no bit growth issue here in the tutorial
>>>> 2, I am not sure why this error message shows up here as well.
>>>>
>>>> I have attached the slx and fpg files I created for a 14 bit RP board
>>>> for the tutorial 2.
>>>>
>>>> On Tue, Apr 7, 2020 at 2:52 AM Adam Isaacson <aisaac...@ska.ac.za>
>>>> wrote:
>>>>
>>>>> Dear Aravind,
>>>>>
>>>>> I have fixed your slx file - see attached. There were a few issues:
>>>>>
>>>>> 1) sw_reg reg_cntrl yellow block bitfield type was not set to boolean
>>>>> 2) your snapshot, adc_in_snap, was not setup correctly. You have to
>>>>> manually add the names in the snapshot fields - double click on the
>>>>> snapshot and see "input" tab
>>>>> 3) Your adc_sample_ctr was set to 9 bits and not 32 bits.
>>>>>
>>>>> It should compile fine now. My advice is that if you are struggling to
>>>>> get your slx file to compile, then look at the completed design slx file 
>>>>> in
>>>>> github and make sure your design matches that. There is a completed slx
>>>>> model and working fpg file for each tutorial.
>>>>>
>>>>> Kind regards,
>>>>>
>>>>> Adam Isaacson
>>>>> South African Radio Astronomy Observatory (SARAO)
>>>>> Hardware Manager
>>>>> Cell: (+27) 825639602
>>>>> Tel:  (+27) 215067300
>>>>> email: aisaac...@ska.ac.za
>>>>>
>>>>>
>>>>>
>>>>> On Tue, Apr 7, 2020 at 10:28 AM Adam Isaacson <aisaac...@ska.ac.za>
>>>>> wrote:
>>>>>
>>>>>> Dear Aravind,
>>>>>>
>>>>>> Did you know there is an existing, working and completed slx file
>>>>>> (tut_adc_dac.slx) for this tutorial in:
>>>>>>
>>>>>>
>>>>>> https://github.com/casper-astro/tutorials_devel/tree/master/red_pitaya/tut_adc_dac
>>>>>>
>>>>>> I would compare that file with your file attached and look for any
>>>>>> differences. I am also going to look at your file and see if I can spot
>>>>>> anything. Stay tuned.
>>>>>>
>>>>>> Kind regards,
>>>>>>
>>>>>> Adam Isaacson
>>>>>> South African Radio Astronomy Observatory (SARAO)
>>>>>> Hardware Manager
>>>>>> Cell: (+27) 825639602
>>>>>> Tel:  (+27) 215067300
>>>>>> email: aisaac...@ska.ac.za
>>>>>>
>>>>>> git clone https://github.com/casper-astro/casperfpga
>>>>>> $ cd casperfpga/
>>>>>>
>>>>>>
>>>>>>
>>>>>> On Tue, Apr 7, 2020 at 1:53 AM Aravind Venkitasubramony <
>>>>>> arve9...@colorado.edu> wrote:
>>>>>>
>>>>>>> Hi
>>>>>>>
>>>>>>> I followed the tutorial and created the .slx file. While compiling I
>>>>>>> got these errors from simulink.
>>>>>>>
>>>>>>>
>>>>>>> Matching "From" for "Goto" 'rp_tut2/adc_in_snap/ss/goto_ss_we1' not
>>>>>>> found [4 similar]
>>>>>>> Component:Simulink | Category:Block warning
>>>>>>> Output port 1 of 'rp_tut2/dac/rp_tut2_dac_dac0_data_i_in' is not
>>>>>>> connected. [8 similar]
>>>>>>> Component:Simulink | Category:Block warning
>>>>>>> The input type propagated to this block did not match the specified
>>>>>>> type.
>>>>>>>   Expected Type: Bool
>>>>>>>   Actual Type: Fix_10_0
>>>>>>>
>>>>>>> Error occurred during "Rate and Type Error Checking".
>>>>>>>
>>>>>>>
>>>>>>> Reported by:
>>>>>>>   'rp_tut2/adc_in_snap/assert_b'
>>>>>>> A summary of Sysgen errors has been written to
>>>>>>> '/home/cet/RP_work/models/rp_tut2/rp_tut2_sysgen_error.log'
>>>>>>>
>>>>>>> Reported by:
>>>>>>>   'rp_tut2/adc_in_snap/assert_b'
>>>>>>>
>>>>>>> I also notice that I do not get the "in_adc_data_valid" port shown
>>>>>>> in the in the bit field snap block on the tutorial page. Other than 
>>>>>>> that, I
>>>>>>> recreated everything as mentioned in the tutorial page. I have attached 
>>>>>>> the
>>>>>>> .slx  and the sysgen error log files also alongwith
>>>>>>>
>>>>>>> --
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>>>>>>> To view this discussion on the web visit
>>>>>>> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/ddcf80a1-1118-4262-94a1-1e7cc66f0056%40lists.berkeley.edu
>>>>>>> <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/ddcf80a1-1118-4262-94a1-1e7cc66f0056%40lists.berkeley.edu?utm_medium=email&utm_source=footer>
>>>>>>> .
>>>>>>>
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>>>>>
>>>>> git clone https://github.com/casper-astro/casperfpga
>>>>> $ cd casperfpga/
>>>>>
>>>>> per+unsubscr...@lists.berkeley.edu
>>>>> <casper+unsubscr...@lists.berkeley.edu>.
>>>>> To view this discussion on the web visit
>>>>> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CADTJ%3DnFCBeu6L8r5Rc14hGQ8UX2M6b8dX%3DbfEqOgk5XsRnv76g%40mail.gmail.com
>>>>> <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CADTJ%3DnFCBeu6L8r5Rc14hGQ8UX2M6b8dX%3DbfEqOgk5XsRnv76g%40mail.gmail.com?utm_medium=email&utm_source=footer>
>>>>> .
>>>>>
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>>>> <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CAFQ_oEjUNuX%3DeOnPoNuNXJ1fkC5iCFHDsYKWj7Fc-815uLmZVg%40mail.gmail.com?utm_medium=email&utm_source=footer>
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