Hi, Dan Thanks for you help. I'll try the first solution as you mentioned.
Cheers! >------------------------------------------------------------------------ ZHANG Laiyu Phone(China) 010-88233078 Cellphone(China) 13681385567 E-mail: [email protected] Address: 19B Yuquan Road,Shijingshan District,Beijing，China Department: Center for Particle Astrophysics Office: Astrophysics Building 205 Institute of High Energy Physics, CAS web: http://www.ihep.cas.cn >------------------------------------------------------------------------ -----原始邮件----- 发件人:"Dan Werthimer" <[email protected]> 发送时间:2020-07-24 01:32:50 (星期五) 收件人: "CASPER Mailing List" <[email protected]>, [email protected] 抄送: 主题: Re: [casper] 10GbE_V2 adc_mkid_4x tut2 hi zhang laiyu, here are three things you could try: 1) send your adc samples into a short fifo, then feed five of the 12 bit ADC samples at a time (instead of four samples) from the fifo into each 64 bit word feeding the 10Gbe block. do this for the first 103 fpga clocks out of 128, then lower valid for the next 15 fpga clocks. 2) increase the fpga clock by 2X send ADC samples into a FIFO, then burst them out of the FIFO for 128 clocks, then lower valid for the next 128 clocks. 3) use two 10Gbe ports, with 50% duty cycle, alternating between the two ports: send the first 512 adc samples to one 10Gbe for the first 128 clocks, then lower valid on this 10Gbe for 128 clocks. send the next 512 adc samples to the other 10GBe for the second 128 clocks, then lower valid for 128 clocks. choice three is the easiest to implement, but requires two 10Gbe cables. best wishes, dan On Wed, Jul 22, 2020 at 3:22 AM zhang laiyu <[email protected]> wrote: Hi, I'm trying to sample data with adc_mkid_4x (MUSIC ADC-DAC board) and send the samples over 10gbE. The frequency of ADC is 491.52MHz,and the frequency of FPGA is 122.88MHz. I combined data_i0,data_i1,data_i2, data_i3 of MKID_ADC to a 64 bits data and directly connected to tx_data of gbe0. I used the tut2 pkt_sim block to control the tx-valid and eof port of gbe0. Now,I can get UDP packages through 10Gb cable. I set the package length to 128(equal to 1024 bytes). But because the valid port can not be high in all time, so I will lost part of ADC data. How can I get entire ADC data from 10Gbe? Has anyone done some kind of a "similar model" which i could study or give some suggestion? Attachment is the model file. Thanks! >------------------------------------------------------------------------ ZHANG Laiyu Phone(China) 010-88233078 Cellphone(China) 13681385567 E-mail: [email protected] Address: 19B Yuquan Road,Shijingshan District,Beijing，China Department: Center for Particle Astrophysics Office: Astrophysics Building 205 Institute of High Energy Physics, CAS web: http://www.ihep.cas.cn >------------------------------------------------------------------------ -- You received this message because you are subscribed to the Google Groups "[email protected]" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/1edfd2fe.60d79.173760b523c.Coremail.zhangly%40ihep.ac.cn. -- You received this message because you are subscribed to the Google Groups "[email protected]" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CAGHS_vFBu25J2Zwa5%3D853QXg%2BDQGU39CXuREzm6cJTnc8Efe8Q%40mail.gmail.com. -- You received this message because you are subscribed to the Google Groups "[email protected]" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/8817363.62250.1737f575be8.Coremail.zhangly%40ihep.ac.cn.
