Thanks, Dave, Bob, Brian. Great suggestions all round. Cheers Jack
[Muses whether CASPERites should pool together for a training session...] On Fri, 25 Jun 2021 at 03:57, Hawkins, David W (US 334B) < [email protected]> wrote: > Sorry, I missed the rest of a comment: > > > > >> there is “standard” way of doing things … > > > > The Mentor way, the Cadence way, the Aldec way, … you get the drift. > > > > Mentor’s Verification Academy has a lot of good resources for learning > SystemVerilog, UVM, Code Coverage. > > > > On the subject of Code Coverage, Ray Salemi’s book was not bad (FPGA > Simulation: A Complete Step-by-Step Guide), a little dated now (since it > has no UVM details), but it has good pragmatic details. His book on UVM is > terrible, skip that. > > > > *From:* Hawkins, David W (US 334B) > *Sent:* Thursday, June 24, 2021 7:54 PM > *To:* [email protected] > *Cc:* [email protected] <[email protected]> > *Subject:* RE: [casper] System Verilog > > > > Hi All, > > > > Cliff Cummings still does training. We have had him come to JPL to give > classes in UVM. He has a good teaching style. I have his contact details if > anyone is interested. (His company is now part of Paradigm-Works, another > company I have used). > > > > Once you dig into UVM, you’ll find that there is “standard” way of doing > things. > > > > Regarding good books on System Verilog – the Chris Spears book is good. He > works for Mentor, and can also provide training. Last time I talked to him > (in the last year or so), Mentor was offering online training for groups. I > think the Avionics guys used him. > > > > Regards, > > Dave > > > > *From:* Bob Stricklin <[email protected]> > *Sent:* Thursday, June 24, 2021 7:42 PM > *To:* [email protected] > *Cc:* [email protected] <[email protected]> > *Subject:* [EXTERNAL] Re: [casper] System Verilog > > > > If you are still looking and can afford to pay for a pro trainer check > out: > > > > http://www.sunburst-design.com > <https://urldefense.us/v3/__http:/www.sunburst-design.com__;!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0OrS1-AHQ$> > > > > His website is a little out of date but if Cliff Cummings is still > training he has a complete course and he has trained hundreds of people. > Cliff may have something you can tag along on at a lower cost to you. > > > > Bob Stricklin > > > > On Jun 24, 2021, at 8:30 PM, Brian Bradford <[email protected]> > wrote: > > > > Hey Jack, > > > > A little late here but better late than never I suppose... > > > > Papers worth a read: > > - > > https://sutherland-hdl.com/papers/2013-SNUG-SV_Synthesizable-SystemVerilog_paper.pdf > > <https://urldefense.us/v3/__https:/sutherland-hdl.com/papers/2013-SNUG-SV_Synthesizable-SystemVerilog_paper.pdf__;!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0O-WlJkkA$> > > - > > http://www.sunburst-design.com/papers/CummingsSNUG2003SJ_SystemVerilogFSM.pdf > > <https://urldefense.us/v3/__http:/www.sunburst-design.com/papers/CummingsSNUG2003SJ_SystemVerilogFSM.pdf__;!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0NizDV12Q$> > - > https://sutherland-hdl.com/papers/2007-SNUG-SanJose_gotcha_again_paper.pdf > > <https://urldefense.us/v3/__https:/sutherland-hdl.com/papers/2007-SNUG-SanJose_gotcha_again_paper.pdf__;!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0N2K36gxg$> > > Colleagues also recommended these Sutherland textbooks ( > https://www.sutherland-hdl.com/books_and_guides.html > <https://urldefense.us/v3/__https:/www.sutherland-hdl.com/books_and_guides.html__;!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0PQSB04Zg$> > ): > > - RTL Modeling with SystemVerilog For Simulation and Synthesis > - SystemVerilog For Design (2nd edition) > > Cheers, > > Brian > > > > On Friday, April 30, 2021 at 4:05:55 AM UTC-7 [email protected] > <https://urldefense.us/v3/__http:/gmail.com__;!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0PSYCGeug$> > wrote: > > Hi CASPERites, > > > > Does anyone have any resources for learning System Verilog they've used > and particularly like? > > > > Cheers > > Jack > > > > -- > You received this message because you are subscribed to the Google Groups " > [email protected]" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > To view this discussion on the web visit > https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/78e8c000-0ec2-4701-a7bd-6e04171a06b5n%40lists.berkeley.edu > <https://urldefense.us/v3/__https:/groups.google.com/a/lists.berkeley.edu/d/msgid/casper/78e8c000-0ec2-4701-a7bd-6e04171a06b5n*40lists.berkeley.edu?utm_medium=email&utm_source=footer__;JQ!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0O2kYyuyA$> > . > > > > -- > You received this message because you are subscribed to the Google Groups " > [email protected]" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > To view this discussion on the web visit > https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/3740CC4E-8FC5-4C08-B6FA-6B91AACBC953%40n5brg.com > <https://urldefense.us/v3/__https:/groups.google.com/a/lists.berkeley.edu/d/msgid/casper/3740CC4E-8FC5-4C08-B6FA-6B91AACBC953*40n5brg.com?utm_medium=email&utm_source=footer__;JQ!!PvBDto6Hs4WbVuu7!ef5nllTVCzl5TjYxul5qHNf1qkiTvYpMzxrqvfqoD9XKp3PSQ3b03dGlSupLKUUUs0MyAKYd5w$> > . > -- You received this message because you are subscribed to the Google Groups "[email protected]" group. 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