Hi, 

I am trying to use CASPER toolflow for my development work on Red Pitaya 
STEMLAB 125-14 board. I wish to use DDS and Cordic Compilers in System 
Generator Environment but I am not able to see any output from DDS. My settings 
are as follows: 

Configuration Options : Phase_Generator_and_SIN_COS_LUT 
System Clock (MHz) : 125 
Number of Channels : 1 

Parameter Selection: Hardware_Parameters 
Noise Shaping : None 
Phase Width : 32 
Output Width : 14 

Use Explicit period: CHECKED 
Explicit Period: 8e-9 

Phase Increment Programmability : Programmable 

I wish to generate a 3.90625 MHz sine wave out from DDS and feed it to Red 
Pitaya DAC channel 1. So the Phase increment value is computed in ufix_32_32 as 
= (3.90625/125)*2^32 

config_tvalid port of DDS is connected to XSG Constant block with boolean value 
1 

config_tdata_pinc of DDS connection is tried in 3 ways: 
1. using a xilinx constant with a value = 0.03125 and configured as ufix_32_32 
2. using a simulink constant with value = 0.03125 which is connected to a 
software register with "From Processor" setup and configured as ufix_32_32. I 
am not sure, how to send it a value using rp.write() function. 
3. using a simulink constant with value = 0.03125 which is connected to a 
software register with "From Processor" setup and configured as ufix_32_0 i.e. 
as integer, followed by a Right Shift operator by 32 and output format as 
ufix_32_32. This is done so that I can pass a value to software register by 
using rp.write_int() function. 

In the simulink model I have tried with Simulink System Period (sec) = 1 as 
well as 8e-9 

But no setting is helping me to observe a sine wave signal from DAC output. 

Please help in identifying an issue with my design settings. 

Also let me know, is it possible to use DDS, and SINCOS blocks from CASPER XPS 
toolset in simulink? If yes then how to set it up? 

Any help will be highly appreciable. 


Thank you. 

-- 
Ashish Sharma 
Inter-University Accelerator Centre, 
India 

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