>
> Wei Liu's code helped because it gave me the idea to call rampTest()
> first. Is rampTest() the only "calibration" that Wei Liu's code is
> doing? rampTest() calls alignLineClock() and alignFrameClock(). Is this all
> that you mean by "calibration"? Not some fine-tuning or balancing of gains
> or delays for different sub-ADCs, which then get interleaved together?
>
> As you probably know the ADC has 8-cores (each of the 4 main cores are
actually two sub-cores which are interleaved, and they start in a random
order on power up. The main focus of the casper calibration code is for
ordering these samples in the correct way. Aligning the clocks should also
deal with the delays, but we don't apply gain inter-core corrections.

>
> adc.set_gain() still does nothing, even when called where Wei Liu's code
> calls it. Where in the startup process should this get called?
>

I believe that set gain is for input signals, so it won't impact the actual
calibration (I would actually recommend keeping it below 8, it moves into a
"digital" gain after that which mostly just confuses things).

The py38-dev and py38 branches of casperfpga differ in only trivial ways
> in snapadc.py. Maybe the changes you spoke of have already been merged into
> py38?
>
> py38 was supposed to work, but there were still some hiccups - Wei fixed
them up, so they should be close.


> As for the build error, I've only tried SNAP tutorial 1 and 3 and I got
> the error for both. Once Xilinx finally gets back to me about an academic
> license, I'll be able to try it on my RFSoC 4x2. Does it normally take more
> than a month to process a donation request? I've asked twice.
>
> For a software donation, I've typically found it to be fairly fast (almost
automated - a few days at most), but it has been a long time since I last
asked - someone with more recent experience might be able to chime in.

Best,
Jonathon



>

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