Does anybody have a snap_tut_spec.fpg built with mlib_devel branch m2021a 
that works with casperfpga branch py38-dev, and passes the rampTest 
calibration procedure? I'm still having issues.

If I use the older branch py38, and the example .fpg file included in 
tutorials_devel at 
https://github.com/casper-astro/tutorials_devel/tree/main/snap/tut_spec , I 
do get it to work. It calibrates using rampTest. Annoyingly,  
fpga.adcs['snap_adc'] was not automatically populated 
after fpga.upload_to_ram_and_program(), meaning I had to create an adc 
object "by hand" using" adc=casperfpga.snapadc.SnapAdc(fpga, 
num_chans=numChannel, resolution=8, ref=10). The py38 branch does NOT work 
for the .fpg file that I jasper build from the snap_tut_spec.slx. If I try 
to fpga.upload_to_ram_and_program() that .fpg build on py38, I get an error 
in CasperFpga._create_casper_adc_devices.

If I use the recommended branch py38-dev, I CANNOT load the example .fpg 
file included in tutorials_devel. It does not populate fpga.adcs with this 
file, nor can I build the SnapAdc object "by hand" like I did above. I can, 
however, load my own .fpg build, and it does properly create 
adc=fpga.adcs['snap_adc']. Unfortunately, calling adc.alignFrameClock() 
runs forever. This is called by adc.rampTest() which therefore also runs 
forever. This is what happens with I use the example adc calibration code 
developed by Wei Liu, which you linked to above.

Since I cannot re-build snap_tut_spec.slx, load it, and calibrate, I can't 
make any changes.

I'm having similar issues with the correlator tutorial. The stock 
file snap_tut_corr.fpg loads and calibrates under py38, but it returns 
nonsense spectra (half zero) and doesn't work in py38-dev. I can't add or 
tweak things in the .slx because then it hangs on the rampTest calibration 
like the tut_spec examples.

Thanks,
Jason
On Tuesday, May 16, 2023 at 3:23:26 AM UTC+10 Jonathon Kocz wrote:

>
>> Wei Liu's code helped because it gave me the idea to call rampTest() 
>> first. Is rampTest() the only "calibration" that Wei Liu's code is 
>> doing? rampTest() calls alignLineClock() and alignFrameClock(). Is this all 
>> that you mean by "calibration"? Not some fine-tuning or balancing of gains 
>> or delays for different sub-ADCs, which then get interleaved together?
>>
>> As you probably know the ADC has 8-cores (each of the 4 main cores are 
> actually two sub-cores which are interleaved, and they start in a random 
> order on power up. The main focus of the casper calibration code is for 
> ordering these samples in the correct way. Aligning the clocks should also 
> deal with the delays, but we don't apply gain inter-core corrections.
>  
>>
>> adc.set_gain() still does nothing, even when called where Wei Liu's code 
>> calls it. Where in the startup process should this get called?
>>
>
> I believe that set gain is for input signals, so it won't impact the 
> actual calibration (I would actually recommend keeping it below 8, it moves 
> into a "digital" gain after that which mostly just confuses things).
>
> The py38-dev and py38 branches of casperfpga differ in only trivial ways 
>> in snapadc.py. Maybe the changes you spoke of have already been merged into 
>> py38?
>>
>> py38 was supposed to work, but there were still some hiccups - Wei fixed 
> them up, so they should be close. 
>  
>
>> As for the build error, I've only tried SNAP tutorial 1 and 3 and I got 
>> the error for both. Once Xilinx finally gets back to me about an academic 
>> license, I'll be able to try it on my RFSoC 4x2. Does it normally take more 
>> than a month to process a donation request? I've asked twice.
>>
>> For a software donation, I've typically found it to be fairly fast 
> (almost automated - a few days at most), but it has been a long time since 
> I last asked - someone with more recent experience might be able to chime 
> in. 
>  
> Best,
> Jonathon
>
>
>
>>

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