Hello,

For Bishnu, and Kaj, they report it is specific to the RFDC. In Ken’s case, was 
this specific to the RFDC, or other blocks? This was first addressed in 
https://github.com/casper-astro/mlib_devel/issues/199 with fixes coming from 
https://github.com/casper-astro/mlib_devel/pull/205. In any case, if the issue 
is persistent, or exists with another yellow block, please consider opening an 
issue on Github in casper-astro/mlib_devel with minimal working example or 
details to reproduce from the main `m2021a` branch. Updates to documentation 
and/or tutorials to help others in the future is also encouraged.

Best,
Mitch 

> On Feb 19, 2025, at 1:58 AM, Andrew Martens <and...@sarao.ac.za> wrote:
> 
> Hey Kaj, Ken
> 
> JASPER helpfully ties various project elements together
> - the core generated by the System Generator/ Model Composer compiler
> - HDL cores (registers etc) that attach to ports on the core 
> - software infrastructure that can access registers etc
> 
> Usually, the yellow block init scripts change the names of Simulink 
> input/output ports so that they are predictable and unique. This allows 
> JASPER to link them to the cores in the Vivado project during compilation. 
> The scripts are generally set up so that, when an update (e.g before 
> simulation or compilation) occurs, this port name is updated/changed. It 
> seems that this automatic updating is not happening and that the RFDC init 
> script is probably behaving more like the DSP-related ones (that only change 
> their internals when a mask parameter changes ).
> 
> Changing the name of the .slx and running just the JASPER backend without 
> first running the Matlab frontend is not recommended as JASPER internally no 
> doubt uses the name to predict the port names (and other things), and will 
> use this new name with project components generated with the old name. This 
> will cause chaos.
> 
> Note that this information is slightly dated and refers to the tooflow 
> pre-JASPER. Jack will need to correct me if he has changed certain 
> steps/mechanisms.
> 
> Regards
> Andrew
> 
> On Wed, Feb 19, 2025 at 9:18 AM Kaj Wiik <kaj.w...@utu.fi 
> <mailto:kaj.w...@utu.fi>> wrote:
>> Hi Ken,
>> 
>> Yes, I think I have reported this before, maybe there should be a FAQ 
>> list somewhere.
>> 
>> Just renaming SLX in OS (mv a.slx b.slx) will create all kinds of weird 
>> errors, the correct way to create a file with a different name is to 
>> save the project with a different name inside Simulink.
>> 
>> If I remember correctly, the root cause of this is that the .slx file 
>> contains the file name and is dependent on it. Yes, I cannot think any 
>> other software doing this and it is a very bad design choice IMHO.
>> 
>> Cheers,
>> Kaj
>> 
>> On 19.2.2025 0.30, Ken Semanov wrote:
>> > Changing the file names of an SLX file can cause LUT errors during 
>> > jasper compiles.  These errors are fatal and will drop the compile to 
>> > command line in Matlab. The CASPER toolflow official documentation 
>> > should mention this problem, if -- for no other reason --  CASPER 
>> > doesn't have a mechanism to check whether the current SLX filename has 
>> > been changed
>> > 
>> > These LUT errors occur in the later stages of implementation, during the 
>> > "Logical Optimization" stages.    The blocks in the design which invoke 
>> > the missing logic LUT error are random, and seem to be related to the 
>> > order in which optimizer selects blocks for optimizing. For example,  if 
>> > the offending block is removed, the LUT error will migrate to some other 
>> > -- often unrelated -- block in a different portion of the overall 
>> > design. If that new offending block is removed, the LUT error migrates 
>> > to yet another block, and so on ad infinitum.
>> > 
>> > We might ask why this occurs.  A name-changed SLX survives completely 
>> > through the synthesis stage of jasper compile, making the error 
>> > unusually pernicious.
>> > 
>> > 
>> > 
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