On 09/16/2016 03:20 PM, Jecel Assumpcao Jr. wrote: > Note that in the conclusion to this 1979 article, the Motorola > engineers say "It is a 32-bit architecture that supports many data > types and data addresses."
Unfortunately, that doesn't clear the picture any. What would you call a Packard-Bell PB250, with its bit-serial ALU and delay line memory? It had a 22 bit word, with addressing granularity to match. So it's a 22-bit architecture? The TMS9900 has already been identified as a 16-bit ISA, even with its bit-serial ALU. So some enterprising soul could device a shift-register-based MPU with 1-bit memory bus, but with a 256 bit word size and it would be a 256 bit ISA? Now you understand my "Alice Through the Looking-Glass" quote. --Chuck
