On 09/16/2016 07:33 PM, Cameron Kaiser wrote:
>> The PB250 is serial throughout--the registers are implemented as 1
>> bit recirculating devices that are 22 bits in length. Memory is
>> addressable in 22 bit words (no shorter unit of addressing is
>> present) and is again, loops of recirculating serial data. Basic
>> operations are performed on 22-bit words. FWIW, it's a
>> one-plus-one instruction set.
> So why wouldn't this be a 22-bit architecture?
Simply because, as you noted on the TMS9900, a data path can override
the consideration that a machine has a 1-bit ALU.
In the PB250 there are no 22-bit data paths in the whole machine. As a
matter of fact, the PB250 has on the order of only 400 transistors (lots
of diodes, however).
So, does the internal data path width to the machine bear on the
bit-edness of the architecture?
As I pointed out, since, on a machine with no user-visible registers,
the bit-edness can be anything if you ignore data path widths. A
bit-serial memory and ALU could define a word size to be thousands of
bits--all that would be needed is a bit counter to keep one's position
within a "word".
In particular, there were variable word-length machines, so a machine
could have a mixture of word sizes all in play at the same time. But if
you define a machine by the minimum width of its data paths, then a
bit-serial ALU in the TMS9900 would cause it to become a 1-bit machine.
I believe that there were other bit-serial ALU micros in the early
days--maybe the SC/MP? Memory fails me at this point.