> On Sep 17, 2016, at 3:03 PM, Lyle Bickley <lbick...@bickleywest.com> wrote:
> Since I have a running PDP-8/S as an example, I want to back up what Guy
> has said.
> The User Manual for the PDP-8/S says: "The PDP-8/S is a one-address,
> fixed word length, serial computer using a word length of 12-bits plus
> parity and two's complement arithmetic."
> So the architecture is 12-bits and the implementation is serial.
Perhaps the best way to look at this question is that the architecture width of
an architecture is what the architect says it is.
It's often the width of the registers, but not always. It may be the width of
the memory, but not necessarily. It may or may not match the width of the
system bus (if there is one) or the main data paths -- but often it doesn't.
One other example of a machine that confuses the picture is the CDC 6000 series
peripheral processor. I doubt there would be much objection to calling that a
12 bit architecture. But its main register (the accumulator) is 18 bits wide.