On 04/11/2018 11:31 AM, Jecel Assumpcao Jr. via cctalk wrote:

> Besides getting more performance with smaller transistors, we have also
> been increasing performance by taking advantage of more transistors by
> doing more stuff in parallel. So we went from up to dozens of clock
> cycles per instructions to three or four instructions per clock cycle.
> Quite a few of the additional transistors have been use for more and
> more layers of caches.

As one old acquaintance said  "We've given up on reducing the time it
takes one woman to produce a baby.  Our new approach is to use nine
women to get a baby in one month"

...or something to that effect.

--Chuck

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