> -----Original Message-----
> From: Brent Hilpert via cctalk <[email protected]>
> Sent: 13 October 2025 01:23
> To: General Discussion: On-Topic and Off-Topic Posts <[email protected]>
> Cc: Brent Hilpert <[email protected]>
> Subject: [cctalk] Re: Rainbow H7842 PSU
>
> On 2025Oct 12,, at 3:28 PM, Rob Jarratt <[email protected]> wrote:
> >
> …
>
> > I measured AC OK by adding a pull up resistor, but if I am honest, I
> > forgot about this in my latest measurements. I have also looked at
> > Power OK, knowing that AC OK needs a pull up resistor, and it is
> > logically false, so it is definitely saying the power is not OK.
>
> What is ‘logically false’? 0V or –V?
Thanks Brent,
No, its about 7.5V. The comparator +ve input is 6.3V and the -ve input is
10.4V, making the comparator output high impedance. I measure about +4mV on the
gate of the JFET. I think this means the JFET will be conducting and so pulling
the AC OK H down to 0V, which is what I see when I include a pull up resistor
on the AC OK H output. What you write below would seem to confirm this.
>
> DEC used the JFETs to drive AC-OK so that no-power/power-off state would
> present low-Z-to-GND at AC-OK (i.e. 0V / LOW).
> If they used a bipolar, it would need power (base current) to get low-Z / 0V /
> AC-is-not-OK. Catch-22.
>
> The JFET conducts by default (gate JFET.G=0V), it needs V to pinch off
> conduction so it can go ’high'.
> But that JFET.G V must be negative (relative to source terminal JFET.S) to
> pinch
> off.
> And that’s why E1 has GND-pin at –V, so it’s output “Power-OK” can drive the
> JFET.G below JFET.S which is at circuit GND.
>
> So:
> E1a.+ E1b.– Power-
> OK(E1b.out) AC-OK
> ==== ====
> =============== =====
> power good: +5V ~~ +15V ~~ –12V
> ~ hi-Z
> power-bad: +5V ~~ < E1a.+ >+6V ~
> low-Z
> power-off: 0V 0V 0V
> low-Z
>
> ~ = approximate
>
> (Above is supposed to render as a tabbed table)
>
> > ...
>
> > Vstart is 11.3V and Vz is 6.4V. I have not been able to find where Vz
> > comes from on the schematic either, if I elaborate the KiCad
> > schematics further I will try to find its source.
>
> TDS = Tony’s schematic
> DRM = DEC rainbow manual per Wayne’s ref.
>
> Vz is in the lower left corner of TDS.pdf.5.
> Vz is apparently “V PR” in DRM and should be 5.1V [DRM.pdf.261-7.4.2.1].
> Which is to say the zener there is some 5.1V type.
> 6.4V is rather high.
> I would suggest finding that zener on the board and measure right across it.
I will locate this diode and measure it and also check the 7812, but it might
be a couple of days before I get time to do this.
Thanks
Rob
>
> 11.3V also seems a little low for output from a 7812.
> TDS.Vstart is apparently DRM.Vbias.
>
>
> > The supply to E1, E2 and E3 is 11.3V,
> > referenced to the GND output, the GND pin on E1 is -12.9V and the GND
> > pins on E2 and E3 are -0.7V
>
> I would still suggest checking the two “–12V” sources for connection.
> I expect they are not connected, and that E1.GND goes to the 2K7 “startup" –
> 12V [TDS.pdf.2-lower-left-quadrant].
>
> Measuring E2,E3.GND at –0.7 is a little odd if they are connected directly to
> circuit GND, you might want to look if there is a diode dropper involved for
> those pins.
>
> > Let me know if I have missed anything.
