Hi,
This patch adds the following predefined macros:
__ARM_FEATURE_DIRECTED_ROUNDING
__ARM_FEATURE_NUMERIC_MAXMIN
__ARM_FEATURE_IDIV
Note that these are related to Graham Hunter¹s patch, (AArch32 v8 NEON
intrinsics for numeric max/min and directed rounding to integral), and
were unit tested together.
This change is the same as that posted on 5th Sep and reviewed on 8th Sep,
but excludes Graham Hunter¹s changes (committed as r217242).
-Assad
diff --git include/clang/Basic/arm_neon.td include/clang/Basic/arm_neon.td
index 8208a2c..ce3b609 100644
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -1213,7 +1213,7 @@ def FCVTAU_S64 : SInst<"vcvta_u64", "ud", "dQd">;
////////////////////////////////////////////////////////////////////////////////
// Round to Integral
-let ArchGuard = "__ARM_ARCH >= 8" in {
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING)"
in {
def FRINTN_S32 : SInst<"vrndn", "dd", "fQf">;
def FRINTA_S32 : SInst<"vrnda", "dd", "fQf">;
def FRINTP_S32 : SInst<"vrndp", "dd", "fQf">;
@@ -1222,7 +1222,7 @@ def FRINTX_S32 : SInst<"vrndx", "dd", "fQf">;
def FRINTZ_S32 : SInst<"vrnd", "dd", "fQf">;
}
-let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in {
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__) &&
defined(__ARM_FEATURE_DIRECTED_ROUNDING)" in {
def FRINTN_S64 : SInst<"vrndn", "dd", "dQd">;
def FRINTA_S64 : SInst<"vrnda", "dd", "dQd">;
def FRINTP_S64 : SInst<"vrndp", "dd", "dQd">;
@@ -1235,12 +1235,12 @@ def FRINTI_S64 : SInst<"vrndi", "dd", "fdQfQd">;
////////////////////////////////////////////////////////////////////////////////
// MaxNum/MinNum Floating Point
-let ArchGuard = "__ARM_ARCH >= 8" in {
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_NUMERIC_MAXMIN)" in {
def FMAXNM_S32 : SInst<"vmaxnm", "ddd", "fQf">;
def FMINNM_S32 : SInst<"vminnm", "ddd", "fQf">;
}
-let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in {
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__) &&
defined(__ARM_FEATURE_NUMERIC_MAXMIN)" in {
def FMAXNM_S64 : SInst<"vmaxnm", "ddd", "dQd">;
def FMINNM_S64 : SInst<"vminnm", "ddd", "dQd">;
}
diff --git lib/Basic/Targets.cpp lib/Basic/Targets.cpp
index 4998ca3..61cf0bd 100644
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -3983,6 +3983,10 @@ public:
// __ARM_ARCH is defined as an integer value indicating the current ARM ISA
Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
+ if (CPUArch[0] >= '8') {
+ Builder.defineMacro("__ARM_FEATURE_NUMERIC_MAXMIN");
+ Builder.defineMacro("__ARM_FEATURE_DIRECTED_ROUNDING");
+ }
// __ARM_ARCH_ISA_ARM is defined to 1 if the core supports the ARM ISA. It
// is not defined for the M-profile.
@@ -4478,6 +4482,10 @@ public:
Builder.defineMacro("__ARM_FEATURE_CLZ");
Builder.defineMacro("__ARM_FEATURE_FMA");
Builder.defineMacro("__ARM_FEATURE_DIV");
+ Builder.defineMacro("__ARM_FEATURE_IDIV"); // As specified in ACLE
+ Builder.defineMacro("__ARM_FEATURE_DIV"); // For backwards compatibility
+ Builder.defineMacro("__ARM_FEATURE_NUMERIC_MAXMIN");
+ Builder.defineMacro("__ARM_FEATURE_DIRECTED_ROUNDING");
Builder.defineMacro("__ARM_ALIGN_MAX_STACK_PWR", "4");
diff --git test/Preprocessor/aarch64-target-features.c
test/Preprocessor/aarch64-target-features.c
index 137a1d8..74764c2 100644
--- test/Preprocessor/aarch64-target-features.c
+++ test/Preprocessor/aarch64-target-features.c
@@ -12,8 +12,11 @@
// CHECK: __ARM_FEATURE_CLZ 1
// CHECK-NOT: __ARM_FEATURE_CRC32 1
// CHECK-NOT: __ARM_FEATURE_CRYPTO 1
+// CHECK: __ARM_FEATURE_DIRECTED_ROUNDING 1
// CHECK: __ARM_FEATURE_DIV 1
// CHECK: __ARM_FEATURE_FMA 1
+// CHECK: __ARM_FEATURE_IDIV 1
+// CHECK: __ARM_FEATURE_NUMERIC_MAXMIN 1
// CHECK: __ARM_FEATURE_UNALIGNED 1
// CHECK: __ARM_FP 0xe
// CHECK: __ARM_FP16_FORMAT_IEEE 1
diff --git test/Preprocessor/arm-acle-6.4.c test/Preprocessor/arm-acle-6.4.c
index a656f76..fc228d0 100644
--- test/Preprocessor/arm-acle-6.4.c
+++ test/Preprocessor/arm-acle-6.4.c
@@ -5,6 +5,8 @@
// CHECK-CORTEX-M0-NOT: __ARM_ARCH_ISA_ARM
// CHECK-CORTEX-M0: __ARM_ARCH_ISA_THUMB 1
// CHECK-CORTEX-M0: __ARM_ARCH_PROFILE 'M'
+// CHECK-CORTEX-M0-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
+// CHECK-CORTEX-M0-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
// RUN: %clang -target arm-eabi -mcpu=arm810 -x c -E -dM %s -o - | FileCheck
%s -check-prefix CHECK-ARM810
@@ -13,6 +15,8 @@
// CHECK-ARM810: __ARM_ARCH_ISA_ARM 1
// CHECK-ARM810-NOT: __ARM_ARCH_ISA_THUMB
// CHECK-ARM810-NOT: __ARM_ARCH_PROFILE
+// CHECK-ARM810-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
+// CHECK-ARM810-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
// RUN: %clang -target arm-eabi -mcpu=arm7tdmi -x c -E -dM %s -o - | FileCheck
%s -check-prefix CHECK-ARM7TDMI
@@ -29,6 +33,8 @@
// CHECK-CORTEX-A7: __ARM_ARCH_ISA_ARM 1
// CHECK-CORTEX-A7: __ARM_ARCH_ISA_THUMB 2
// CHECK-CORTEX-A7: __ARM_ARCH_PROFILE 'A'
+// CHECK-CORTEX-A7-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
+// CHECK-CORTEX-A7-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
// RUN: %clang -target arm-eabi -mcpu=cortex-r4 -x c -E -dM %s -o - |
FileCheck %s -check-prefix CHECK-CORTEX-R4
diff --git test/Preprocessor/arm-target-features.c
test/Preprocessor/arm-target-features.c
index 08fe29a..e3bee55 100644
--- test/Preprocessor/arm-target-features.c
+++ test/Preprocessor/arm-target-features.c
@@ -3,18 +3,24 @@
// CHECK: __ARM_ARCH 8
// CHECK: __ARM_ARCH_8A__ 1
// CHECK: __ARM_FEATURE_CRC32 1
+// CHECK: __ARM_FEATURE_DIRECTED_ROUNDING 1
+// CHECK: __ARM_FEATURE_NUMERIC_MAXMIN 1
// RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck
--check-prefix=CHECK-V7 %s
// CHECK-V7: __ARMEL__ 1
// CHECK-V7: __ARM_ARCH 7
// CHECK-V7: __ARM_ARCH_7A__ 1
// CHECK-V7-NOT: __ARM_FEATURE_CRC32
+// CHECK-V7-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
+// CHECK-V7-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
// RUN: %clang -target armv8a -mfloat-abi=hard -x c -E -dM %s | FileCheck
--check-prefix=CHECK-V8-BAREHF %s
// CHECK-V8-BAREHF: __ARMEL__ 1
// CHECK-V8-BAREHF: __ARM_ARCH 8
// CHECK-V8-BAREHF: __ARM_ARCH_8A__ 1
// CHECK-V8-BAREHF: __ARM_FEATURE_CRC32 1
+// CHECK-V8-BAREHF: __ARM_FEATURE_DIRECTED_ROUNDING 1
+// CHECK-V8-BAREHF: __ARM_FEATURE_NUMERIC_MAXMIN 1
// CHECK-V8-BAREHF: __ARM_NEON__ 1
// CHECK-V8-BAREHF: __VFP_FP__ 1
@@ -149,6 +155,8 @@
// A5:#define __ARM_ARCH 7
// A5:#define __ARM_ARCH_7A__ 1
// A5:#define __ARM_ARCH_PROFILE 'A'
+// A5-NOT: #define __ARM_FEATURE_NUMERIC_MAXMIN
+// A5-NOT: #define __ARM_FEATURE_DIRECTED_ROUNDING
// Test whether predefines are as expected when targeting cortex-a7.
// RUN: %clang -target armv7 -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck
--check-prefix=A7 %s
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