On May 24, 2011, at 2:17 PM, Bruno Cardoso Lopes wrote: > Hi, > > Add support for ARM ldrexd/strexd intrinsics. ldrexd and strexd both > use register pairs to load/store i64 values. The register pair > constraint specifies that the first register should be even and the > second the following odd. Teach the pre-regalloc LoadStoreOptimizer to > use register allocator hints to respect the constraint and teach the > post-reagalloc to fix the pair (with a very conservative approach) > when the hint fails. A testcase is also present.
The regalloc stuff is gross, but it will work. I would prefer to model the even/odd pair constraint explicitly, but we don't yet have an elegant way of doing that. +what Renato said. /jakob _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
