On Wed, May 25, 2011 at 3:50 PM, Renato Golin <[email protected]> wrote: > On 25 May 2011 19:28, Jim Grosbach <[email protected]> wrote: >> Yes, beyond the __sync* style builtins from GCC. > > I see, so then Bruno's patch (at least the intrinsic part) is correct. > I have no objections on creating an @llvm.arm.ldrex(d) intrinsic.
Like Jim said, we would really need them for directly generating the instructions, also there is no @llvm.atomic.load version which isn't suffixed by add, sub, ..., not that I found at least. I can add builtins/intrinsics for the other versions (byte,half,word) if someone think it's worth doing so. For this specific STREXD/ LDREXD patch, is there anything else that someone would like me to address? Jakob, I agree that regalloc stuff is gross, but since both instructions are only used by these intrinsic right now the impact isn't great. Also, I'm not sure how to make it cleaner, can you point to some code that model the even/odd pair constraint explicitly in a more elegant way? I'll wait a little bit more and if there's no opposition I'm going to commit it. Thank you! -- Bruno Cardoso Lopes http://www.brunocardoso.cc _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
