andykaylor wrote: > Since this alignment is effectively always `1` (and doesn’t carry useful > information for these cases), I’m wondering whether it would be better to > **drop the extra align operand in the CIR masked.load intrinsic call** and > keep CIR aligned with LLVM’s operand shape, rather than > introducing/maintaining a CIR-specific masked-load op + dedicated lowering to > LLVM IR.
@woruyu While we always pass align as `1` for the group of intrinsics you mentioned, we will use a potentially different alignment when handling `BI__builtin_ia32_loadaps128_mask` and related builtins. You should keep the alignment parameter. It is passed to the LLVM IR intrinsic as an attribute on the first argument, and can be set as an attribute on the LLVM `MaskedLoadOp` (https://mlir.llvm.org/docs/Dialects/LLVM/#llvmintrmaskedload-llvmmaskedloadop). For this PR, I would like to see new CIR operations created that correspond to the masked load and masked store operations in the LLVM dialect and lower directly to them. https://github.com/llvm/llvm-project/pull/169464 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
