llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clangir Author: Jianjian Guan (jacquesguan) <details> <summary>Changes</summary> --- Patch is 54.92 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/196224.diff 8 Files Affected: - (modified) clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c (-243) - (modified) clang/test/CIR/CodeGenBuiltins/builtin-memchr.c (+1-7) - (modified) clang/test/CIR/CodeGenBuiltins/builtin-object-size.cpp (+1-19) - (modified) clang/test/CIR/CodeGenBuiltins/builtin-signbit.c (+1-33) - (modified) clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c (+1-112) - (modified) clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp (+1-3) - (modified) clang/test/CIR/CodeGenBuiltins/builtins-pred-info.c (+1-13) - (modified) clang/test/CIR/CodeGenBuiltins/builtins.cpp (+1-6) ``````````diff diff --git a/clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c b/clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c index bad83c4f0ef4c..f544b0d0240f9 100644 --- a/clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c +++ b/clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c @@ -84,273 +84,30 @@ void test_fpclassify_inf(){ float infValue = 1.0f / 0.0f; __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, FP_ZERO, infValue); -// CIR: %[[IS_ZERO:.+]] = cir.is_fp_class %{{.+}}, fcZero : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_ZERO]], true { -// CIR: cir.const #cir.int<96> : !s32i -// CIR: %[[IS_NAN:.+]] = cir.is_fp_class %{{.+}}, fcNan : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_NAN]], true { -// CIR: cir.const #cir.int<3> : !s32i -// CIR: %[[IS_INF:.+]] = cir.is_fp_class %{{.+}}, fcInf : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_INF]], true { -// CIR: cir.const #cir.int<516> : !s32i -// CIR: %[[IS_NORMAL:.+]] = cir.is_fp_class %{{.+}}, fcNormal : (!cir.float) -> !cir.bool -// CIR: %[[NORMAL_VAL:.+]] = cir.const #cir.int<264> : !s32i -// CIR: %[[SUBNORMAL_VAL:.+]] = cir.const #cir.int<144> : !s32i -// CIR: cir.select if %[[IS_NORMAL]] then %[[NORMAL_VAL]] else %[[SUBNORMAL_VAL]] : (!cir.bool, !s32i, !s32i) -> !s32i -// LLVM: %[[VAL:.+]] = load float, ptr -// LLVM-NEXT: %[[IS_ZERO:.+]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 96) -// LLVM-NEXT: br i1 %[[IS_ZERO]], label %[[BB_ZERO:.+]], label %[[BB_NOT_ZERO:.+]] -// LLVM: [[BB_ZERO]]: -// LLVM-NEXT: br label %[[BB_RET:.+]] -// LLVM: [[BB_NOT_ZERO]]: -// LLVM-NEXT: %[[IS_NAN:.+]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 3) -// LLVM-NEXT: br i1 %[[IS_NAN]], label %[[BB_NAN:.+]], label %[[BB_NOT_NAN:.+]] -// LLVM: [[BB_NAN]]: -// LLVM-NEXT: br label %[[BB_MERGE1:.+]] -// LLVM: [[BB_NOT_NAN]]: -// LLVM-NEXT: %[[IS_INF:.+]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 516) -// LLVM-NEXT: br i1 %[[IS_INF]], label %[[BB_INF:.+]], label %[[BB_NOT_INF:.+]] -// LLVM: [[BB_INF]]: -// LLVM-NEXT: br label %[[BB_MERGE2:.+]] -// LLVM: [[BB_NOT_INF]]: -// LLVM-NEXT: %[[IS_NORMAL:.+]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 264) -// LLVM-NEXT: %[[SEL:.+]] = select i1 %[[IS_NORMAL]], i32 264, i32 144 -// LLVM-NEXT: br label %[[BB_MERGE2]] -// LLVM: [[BB_MERGE2]]: -// LLVM-NEXT: %[[PHI1:.+]] = phi i32 [ %[[SEL]], %[[BB_NOT_INF]] ], [ 516, %[[BB_INF]] ] -// LLVM-NEXT: br label %[[BB_CONT1:.+]] -// LLVM: [[BB_CONT1]]: -// LLVM-NEXT: br label %[[BB_MERGE1]] -// LLVM: [[BB_MERGE1]]: -// LLVM-NEXT: %[[PHI2:.+]] = phi i32 [ %[[PHI1]], %[[BB_CONT1]] ], [ 3, %[[BB_NAN]] ] -// LLVM-NEXT: br label %[[BB_CONT2:.+]] -// LLVM: [[BB_CONT2]]: -// LLVM-NEXT: br label %[[BB_RET]] -// LLVM: [[BB_RET]]: -// LLVM-NEXT: %[[PHI3:.+]] = phi i32 [ %[[PHI2]], %[[BB_CONT2]] ], [ 96, %[[BB_ZERO]] ] -// LLVM-NEXT: br label -// OGCG: %[[CMP_ZERO:.+]] = fcmp oeq float %[[VAL:.+]], -// OGCG-NEXT: br i1 %[[CMP_ZERO]], label %[[BB_RET:.+]], label %[[BB_NOT_ZERO:.+]] -// OGCG: [[BB_RET]]: -// OGCG-NEXT: %[[PHI:.+]] = phi i32 [ 96, %[[BB_ENTRY:.+]] ], [ 3, %[[BB_NOT_ZERO]] ], [ 516, %[[BB_NOT_NAN:.+]] ], [ %[[SEL:.+]], %[[BB_NOT_INF:.+]] ] -// OGCG: [[BB_NOT_ZERO]]: -// OGCG-NEXT: %[[CMP_NAN:.+]] = fcmp uno float %[[VAL]], %[[VAL]] -// OGCG-NEXT: br i1 %[[CMP_NAN]], label %[[BB_RET]], label %[[BB_NOT_NAN]] -// OGCG: [[BB_NOT_NAN]]: -// OGCG-NEXT: %[[FABS:.+]] = call float @llvm.fabs.f32(float %[[VAL]]) -// OGCG-NEXT: %[[CMP_INF:.+]] = fcmp oeq float %[[FABS]], -// OGCG-NEXT: br i1 %[[CMP_INF]], label %[[BB_RET]], label %[[BB_NOT_INF]] -// OGCG: [[BB_NOT_INF]]: -// OGCG-NEXT: %[[CMP_NORMAL:.+]] = fcmp uge float %[[FABS]], -// OGCG-NEXT: %[[SEL]] = select i1 %[[CMP_NORMAL]], i32 264, i32 144 -// OGCG-NEXT: br label %[[BB_RET]] } void test_fpclassify_normal(){ float normalValue = 1.0f; __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, FP_ZERO, normalValue); -// CIR: %[[IS_ZERO:.+]] = cir.is_fp_class %{{.+}}, fcZero : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_ZERO]], true { -// CIR: cir.const #cir.int<96> : !s32i -// CIR: %[[IS_NAN:.+]] = cir.is_fp_class %{{.+}}, fcNan : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_NAN]], true { -// CIR: cir.const #cir.int<3> : !s32i -// CIR: %[[IS_INF:.+]] = cir.is_fp_class %{{.+}}, fcInf : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_INF]], true { -// CIR: cir.const #cir.int<516> : !s32i -// CIR: %[[IS_NORMAL:.+]] = cir.is_fp_class %{{.+}}, fcNormal : (!cir.float) -> !cir.bool -// CIR: %[[NORMAL_VAL:.+]] = cir.const #cir.int<264> : !s32i -// CIR: %[[SUBNORMAL_VAL:.+]] = cir.const #cir.int<144> : !s32i -// CIR: cir.select if %[[IS_NORMAL]] then %[[NORMAL_VAL]] else %[[SUBNORMAL_VAL]] : (!cir.bool, !s32i, !s32i) -> !s32i -// LLVM: %[[VAL:.*]] = load float, ptr -// LLVM-NEXT: %[[IS_ZERO:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 96) -// LLVM-NEXT: br i1 %[[IS_ZERO]], label %[[BB_ZERO:.*]], label %[[BB_NOT_ZERO:.*]] -// LLVM: [[BB_ZERO]]: -// LLVM-NEXT: br label %[[BB_RET:.*]] -// LLVM: [[BB_NOT_ZERO]]: -// LLVM-NEXT: %[[IS_NAN:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 3) -// LLVM-NEXT: br i1 %[[IS_NAN]], label %[[BB_NAN:.*]], label %[[BB_NOT_NAN:.*]] -// LLVM: [[BB_NAN]]: -// LLVM-NEXT: br label %[[BB_MERGE1:.*]] -// LLVM: [[BB_NOT_NAN]]: -// LLVM-NEXT: %[[IS_INF:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 516) -// LLVM-NEXT: br i1 %[[IS_INF]], label %[[BB_INF:.*]], label %[[BB_NOT_INF:.*]] -// LLVM: [[BB_INF]]: -// LLVM-NEXT: br label %[[BB_MERGE2:.*]] -// LLVM: [[BB_NOT_INF]]: -// LLVM-NEXT: %[[IS_NORMAL:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 264) -// LLVM-NEXT: %[[NORMAL_OR_SUBNORMAL:.*]] = select i1 %[[IS_NORMAL]], i32 264, i32 144 -// LLVM-NEXT: br label %[[BB_MERGE2]] -// LLVM: [[BB_MERGE2]]: -// LLVM-NEXT: %[[PHI_INF_SEL:.*]] = phi i32 [ %[[NORMAL_OR_SUBNORMAL]], %[[BB_NOT_INF]] ], [ 516, %[[BB_INF]] ] -// LLVM-NEXT: br label %[[BB_CONT1:.*]] -// LLVM: [[BB_CONT1]]: -// LLVM-NEXT: br label %[[BB_MERGE1]] -// LLVM: [[BB_MERGE1]]: -// LLVM-NEXT: %[[PHI_NAN_SEL:.*]] = phi i32 [ %[[PHI_INF_SEL]], %[[BB_CONT1]] ], [ 3, %[[BB_NAN]] ] -// LLVM-NEXT: br label %[[BB_CONT2:.*]] -// LLVM: [[BB_CONT2]]: -// LLVM-NEXT: br label %[[BB_RET]] -// LLVM: [[BB_RET]]: -// LLVM-NEXT: %[[PHI_FINAL:.*]] = phi i32 [ %[[PHI_NAN_SEL]], %[[BB_CONT2]] ], [ 96, %[[BB_ZERO]] ] -// LLVM-NEXT: br label %[[BB_EXIT:.*]] -// LLVM: [[BB_EXIT]]: -// OGCG: %[[CMP_ZERO:.+]] = fcmp oeq float %[[VAL:.+]], -// OGCG-NEXT: br i1 %[[CMP_ZERO]], label %[[BB_RET:.+]], label %[[BB_NOT_ZERO:.+]] -// OGCG: [[BB_RET]]: -// OGCG-NEXT: %[[PHI:.+]] = phi i32 [ 96, %[[BB_ENTRY:.+]] ], [ 3, %[[BB_NOT_ZERO]] ], [ 516, %[[BB_NOT_NAN:.+]] ], [ %[[SEL:.+]], %[[BB_NOT_INF:.+]] ] -// OGCG: [[BB_NOT_ZERO]]: -// OGCG-NEXT: %[[CMP_NAN:.+]] = fcmp uno float %[[VAL]], %[[VAL]] -// OGCG-NEXT: br i1 %[[CMP_NAN]], label %[[BB_RET]], label %[[BB_NOT_NAN]] -// OGCG: [[BB_NOT_NAN]]: -// OGCG-NEXT: %[[FABS:.+]] = call float @llvm.fabs.f32(float %[[VAL]]) -// OGCG-NEXT: %[[CMP_INF:.+]] = fcmp oeq float %[[FABS]], -// OGCG-NEXT: br i1 %[[CMP_INF]], label %[[BB_RET]], label %[[BB_NOT_INF]] -// OGCG: [[BB_NOT_INF]]: -// OGCG-NEXT: %[[CMP_NORMAL:.+]] = fcmp uge float %[[FABS]], -// OGCG-NEXT: %[[SEL]] = select i1 %[[CMP_NORMAL]], i32 264, i32 144 -// OGCG-NEXT: br label %[[BB_RET]] } void test_fpclassify_subnormal(){ float subnormalValue = 1.0e-40f; __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, FP_ZERO, subnormalValue); -// CIR: %[[IS_ZERO:.+]] = cir.is_fp_class %{{.+}}, fcZero : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_ZERO]], true { -// CIR: cir.const #cir.int<96> : !s32i -// CIR: %[[IS_NAN:.+]] = cir.is_fp_class %{{.+}}, fcNan : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_NAN]], true { -// CIR: cir.const #cir.int<3> : !s32i -// CIR: %[[IS_INF:.+]] = cir.is_fp_class %{{.+}}, fcInf : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_INF]], true { -// CIR: cir.const #cir.int<516> : !s32i -// CIR: %[[IS_NORMAL:.+]] = cir.is_fp_class %{{.+}}, fcNormal : (!cir.float) -> !cir.bool -// CIR: %[[NORMAL_VAL:.+]] = cir.const #cir.int<264> : !s32i -// CIR: %[[SUBNORMAL_VAL:.+]] = cir.const #cir.int<144> : !s32i -// CIR: cir.select if %[[IS_NORMAL]] then %[[NORMAL_VAL]] else %[[SUBNORMAL_VAL]] : (!cir.bool, !s32i, !s32i) -> !s32i -// LLVM: %[[VAL:.*]] = load float, ptr -// LLVM-NEXT: %[[IS_ZERO:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 96) -// LLVM-NEXT: br i1 %[[IS_ZERO]], label %[[BB_ZERO:.*]], label %[[BB_NOT_ZERO:.*]] -// LLVM: [[BB_ZERO]]: -// LLVM-NEXT: br label %[[BB_RET:.*]] -// LLVM: [[BB_NOT_ZERO]]: -// LLVM-NEXT: %[[IS_NAN:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 3) -// LLVM-NEXT: br i1 %[[IS_NAN]], label %[[BB_NAN:.*]], label %[[BB_NOT_NAN:.*]] -// LLVM: [[BB_NAN]]: -// LLVM-NEXT: br label %[[BB_MERGE1:.*]] -// LLVM: [[BB_NOT_NAN]]: -// LLVM-NEXT: %[[IS_INF:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 516) -// LLVM-NEXT: br i1 %[[IS_INF]], label %[[BB_INF:.*]], label %[[BB_NOT_INF:.*]] -// LLVM: [[BB_INF]]: -// LLVM-NEXT: br label %[[BB_MERGE2:.*]] -// LLVM: [[BB_NOT_INF]]: -// LLVM-NEXT: %[[IS_NORMAL:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 264) -// LLVM-NEXT: %[[NORMAL_OR_SUBNORMAL:.*]] = select i1 %[[IS_NORMAL]], i32 264, i32 144 -// LLVM-NEXT: br label %[[BB_MERGE2]] -// LLVM: [[BB_MERGE2]]: -// LLVM-NEXT: %[[PHI_INF_SEL:.*]] = phi i32 [ %[[NORMAL_OR_SUBNORMAL]], %[[BB_NOT_INF]] ], [ 516, %[[BB_INF]] ] -// LLVM-NEXT: br label %[[BB_CONT1:.*]] -// LLVM: [[BB_CONT1]]: -// LLVM-NEXT: br label %[[BB_MERGE1]] -// LLVM: [[BB_MERGE1]]: -// LLVM-NEXT: %[[PHI_NAN_SEL:.*]] = phi i32 [ %[[PHI_INF_SEL]], %[[BB_CONT1]] ], [ 3, %[[BB_NAN]] ] -// LLVM-NEXT: br label %[[BB_CONT2:.*]] -// LLVM: [[BB_CONT2]]: -// LLVM-NEXT: br label %[[BB_RET]] -// LLVM: [[BB_RET]]: -// LLVM-NEXT: %[[PHI_FINAL:.*]] = phi i32 [ %[[PHI_NAN_SEL]], %[[BB_CONT2]] ], [ 96, %[[BB_ZERO]] ] -// LLVM-NEXT: br label %[[BB_EXIT:.*]] -// LLVM: [[BB_EXIT]]: -// OGCG: %[[CMP_ZERO:.+]] = fcmp oeq float %[[VAL:.+]], -// OGCG-NEXT: br i1 %[[CMP_ZERO]], label %[[BB_RET:.+]], label %[[BB_NOT_ZERO:.+]] -// OGCG: [[BB_RET]]: -// OGCG-NEXT: %[[PHI:.+]] = phi i32 [ 96, %[[BB_ENTRY:.+]] ], [ 3, %[[BB_NOT_ZERO]] ], [ 516, %[[BB_NOT_NAN:.+]] ], [ %[[SEL:.+]], %[[BB_NOT_INF:.+]] ] -// OGCG: [[BB_NOT_ZERO]]: -// OGCG-NEXT: %[[CMP_NAN:.+]] = fcmp uno float %[[VAL]], %[[VAL]] -// OGCG-NEXT: br i1 %[[CMP_NAN]], label %[[BB_RET]], label %[[BB_NOT_NAN]] -// OGCG: [[BB_NOT_NAN]]: -// OGCG-NEXT: %[[FABS:.+]] = call float @llvm.fabs.f32(float %[[VAL]]) -// OGCG-NEXT: %[[CMP_INF:.+]] = fcmp oeq float %[[FABS]], -// OGCG-NEXT: br i1 %[[CMP_INF]], label %[[BB_RET]], label %[[BB_NOT_INF]] -// OGCG: [[BB_NOT_INF]]: -// OGCG-NEXT: %[[CMP_NORMAL:.+]] = fcmp uge float %[[FABS]], -// OGCG-NEXT: %[[SEL]] = select i1 %[[CMP_NORMAL]], i32 264, i32 144 -// OGCG-NEXT: br label %[[BB_RET]] } void test_fpclassify_zero(){ float zeroValue = 0.0f; __builtin_fpclassify(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, FP_ZERO, zeroValue); -// CIR: %[[IS_ZERO:.+]] = cir.is_fp_class %{{.+}}, fcZero : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_ZERO]], true { -// CIR: cir.const #cir.int<96> : !s32i -// CIR: %[[IS_NAN:.+]] = cir.is_fp_class %{{.+}}, fcNan : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_NAN]], true { -// CIR: cir.const #cir.int<3> : !s32i -// CIR: %[[IS_INF:.+]] = cir.is_fp_class %{{.+}}, fcInf : (!cir.float) -> !cir.bool -// CIR: cir.ternary(%[[IS_INF]], true { -// CIR: cir.const #cir.int<516> : !s32i -// CIR: %[[IS_NORMAL:.+]] = cir.is_fp_class %{{.+}}, fcNormal : (!cir.float) -> !cir.bool -// CIR: %[[NORMAL_VAL:.+]] = cir.const #cir.int<264> : !s32i -// CIR: %[[SUBNORMAL_VAL:.+]] = cir.const #cir.int<144> : !s32i -// CIR: cir.select if %[[IS_NORMAL]] then %[[NORMAL_VAL]] else %[[SUBNORMAL_VAL]] : (!cir.bool, !s32i, !s32i) -> !s32i -// LLVM: %[[VAL:.*]] = load float, ptr -// LLVM-NEXT: %[[IS_ZERO:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 96) -// LLVM-NEXT: br i1 %[[IS_ZERO]], label %[[BB_ZERO:.*]], label %[[BB_NOT_ZERO:.*]] -// LLVM: [[BB_ZERO]]: -// LLVM-NEXT: br label %[[BB_RET:.*]] -// LLVM: [[BB_NOT_ZERO]]: -// LLVM-NEXT: %[[IS_NAN:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 3) -// LLVM-NEXT: br i1 %[[IS_NAN]], label %[[BB_NAN:.*]], label %[[BB_NOT_NAN:.*]] -// LLVM: [[BB_NAN]]: -// LLVM-NEXT: br label %[[BB_MERGE1:.*]] -// LLVM: [[BB_NOT_NAN]]: -// LLVM-NEXT: %[[IS_INF:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 516) -// LLVM-NEXT: br i1 %[[IS_INF]], label %[[BB_INF:.*]], label %[[BB_NOT_INF:.*]] -// LLVM: [[BB_INF]]: -// LLVM-NEXT: br label %[[BB_MERGE2:.*]] -// LLVM: [[BB_NOT_INF]]: -// LLVM-NEXT: %[[IS_NORMAL:.*]] = call i1 @llvm.is.fpclass.f32(float %[[VAL]], i32 264) -// LLVM-NEXT: %[[NORMAL_OR_SUBNORMAL:.*]] = select i1 %[[IS_NORMAL]], i32 264, i32 144 -// LLVM-NEXT: br label %[[BB_MERGE2]] -// LLVM: [[BB_MERGE2]]: -// LLVM-NEXT: %[[PHI_INF_SEL:.*]] = phi i32 [ %[[NORMAL_OR_SUBNORMAL]], %[[BB_NOT_INF]] ], [ 516, %[[BB_INF]] ] -// LLVM-NEXT: br label %[[BB_CONT1:.*]] -// LLVM: [[BB_CONT1]]: -// LLVM-NEXT: br label %[[BB_MERGE1]] -// LLVM: [[BB_MERGE1]]: -// LLVM-NEXT: %[[PHI_NAN_SEL:.*]] = phi i32 [ %[[PHI_INF_SEL]], %[[BB_CONT1]] ], [ 3, %[[BB_NAN]] ] -// LLVM-NEXT: br label %[[BB_CONT2:.*]] -// LLVM: [[BB_CONT2]]: -// LLVM-NEXT: br label %[[BB_RET]] -// LLVM: [[BB_RET]]: -// LLVM-NEXT: %[[PHI_FINAL:.*]] = phi i32 [ %[[PHI_NAN_SEL]], %[[BB_CONT2]] ], [ 96, %[[BB_ZERO]] ] -// LLVM-NEXT: br label %[[BB_EXIT:.*]] -// LLVM: [[BB_EXIT]]: -// OGCG: %[[CMP_ZERO:.+]] = fcmp oeq float %[[VAL:.+]], -// OGCG-NEXT: br i1 %[[CMP_ZERO]], label %[[BB_RET:.+]], label %[[BB_NOT_ZERO:.+]] -// OGCG: [[BB_RET]]: -// OGCG-NEXT: %[[PHI:.+]] = phi i32 [ 96, %[[BB_ENTRY:.+]] ], [ 3, %[[BB_NOT_ZERO]] ], [ 516, %[[BB_NOT_NAN:.+]] ], [ %[[SEL:.+]], %[[BB_NOT_INF:.+]] ] -// OGCG: [[BB_NOT_ZERO]]: -// OGCG-NEXT: %[[CMP_NAN:.+]] = fcmp uno float %[[VAL]], %[[VAL]] -// OGCG-NEXT: br i1 %[[CMP_NAN]], label %[[BB_RET]], label %[[BB_NOT_NAN]] -// OGCG: [[BB_NOT_NAN]]: -// OGCG-NEXT: %[[FABS:.+]] = call float @llvm.fabs.f32(float %[[VAL]]) -// OGCG-NEXT: %[[CMP_INF:.+]] = fcmp oeq float %[[FABS]], -// OGCG-NEXT: br i1 %[[CMP_INF]], label %[[BB_RET]], label %[[BB_NOT_INF]] -// OGCG: [[BB_NOT_INF]]: -// OGCG-NEXT: %[[CMP_NORMAL:.+]] = fcmp uge float %[[FABS]], -// OGCG-NEXT: %[[SEL]] = select i1 %[[CMP_NORMAL]], i32 264, i32 144 -// OGCG-NEXT: br label %[[BB_RET]] } diff --git a/clang/test/CIR/CodeGenBuiltins/builtin-memchr.c b/clang/test/CIR/CodeGenBuiltins/builtin-memchr.c index 0f6a6261d2a0d..5380dbc371de1 100644 --- a/clang/test/CIR/CodeGenBuiltins/builtin-memchr.c +++ b/clang/test/CIR/CodeGenBuiltins/builtin-memchr.c @@ -3,7 +3,7 @@ // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll // RUN: FileCheck --check-prefix=LLVM --input-file=%t-cir.ll %s // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll -// RUN: FileCheck --check-prefix=OGCG --input-file=%t.ll %s +// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s void *test_char_memchr(const char arg[32]) { return __builtin_char_memchr(arg, 123, 32); @@ -18,9 +18,6 @@ void *test_char_memchr(const char arg[32]) { // LLVM: call ptr @memchr(ptr noundef %{{.*}}, i32 noundef 123, i64 noundef 32) // LLVM: ret ptr -// OGCG-LABEL: @test_char_memchr -// OGCG: call ptr @memchr(ptr noundef %{{.*}}, i32 noundef 123, i64 noundef 32) -// OGCG: ret ptr void *test_memchr(const void *ptr, int val, unsigned long size) { return __builtin_memchr(ptr, val, size); @@ -33,6 +30,3 @@ void *test_memchr(const void *ptr, int val, unsigned long size) { // LLVM: call ptr @memchr(ptr noundef %{{.*}}, i32 noundef %{{.*}}, i64 noundef %{{.*}}) // LLVM: ret ptr -// OGCG-LABEL: @test_memchr -// OGCG: call ptr @memchr(ptr noundef %{{.*}}, i32 noundef %{{.*}}, i64 noundef %{{.*}}) -// OGCG: ret ptr diff --git a/clang/test/CIR/CodeGenBuiltins/builtin-object-size.cpp b/clang/test/CIR/CodeGenBuiltins/builtin-object-size.cpp index b60e24594388d..341fddc089e47 100644 --- a/clang/test/CIR/CodeGenBuiltins/builtin-object-size.cpp +++ b/clang/test/CIR/CodeGenBuiltins/builtin-object-size.cpp @@ -3,7 +3,7 @@ // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll // RUN: FileCheck --input-file=%t-cir.ll %s --check-prefix=LLVM // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll -// RUN: FileCheck --input-file=%t.ll %s --check-prefix=OGCG +// RUN: FileCheck --input-file=%t.ll %s --check-prefix=LLVM // C++-specific tests for __builtin_object_size @@ -11,7 +11,6 @@ int gi; // CIR-LABEL: @_Z5test1v // LLVM-LABEL: define{{.*}} void @_Z5test1v() -// OGCG-LABEL: define{{.*}} void @_Z5test1v() void test1() { // Guaranteeing that our cast removal logic doesn't break more interesting // cases. @@ -23,34 +22,27 @@ void test1() { // CIR: cir.const #cir.int<8> // LLVM: store i32 8 - // OGCG: store i32 8 gi = __builtin_object_size(&c, 0); // CIR: cir.const #cir.int<8> // LLVM: store i32 8 - // OGCG: store i32 8 gi = __builtin_object_size((A*)&c, 0); // CIR: cir.const #cir.int<4> // LLVM: store i32 4 - // OGCG: store i32 4 gi = __builtin_object_size((B*)&c, 0); // CIR: cir.const #cir.int<8> // LLVM: store i32 8 - // OGCG: store i32 8 gi = __builtin_object_size((char*)&c, 0); // CIR: cir.const #cir.int<8> // LLVM: store i32 8 - // OGCG: store i32 8 gi = __builtin_object_size((char*)(A*)&c, 0); // CIR: cir.const #cir.int<4> // LLVM: store i32 4 - // OGCG: store i32 4 gi = __builtin_object_size((char*)(B*)&c, 0); } // CIR-LABEL: @_Z5test2v() // LLVM-LABEL: define{{.*}} void @_Z5test2v() -// OGCG-LABEL: define{{.*}} void @_Z5test2v() void test2() { struct A { char buf[16]; }; struct B : A {}; @@ -58,19 +50,15 @@ void test2() { // CIR: cir.objsize max nullunknown %{{.+}} : !cir.ptr<!void> -> !u64i // LLVM: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 false, i1 true, i1 false) - // OGCG: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 false, i1 true, i1 false) gi = __builtin_object_size(&c->bs[0], 0); // CIR: cir.objsize max nullunknown %{{.+}} : !cir.ptr<!void> -> !u64i // LLVM: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 false, i1 true, i1 false) - // OGCG: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 false, i1 true, i1 false) gi = __builtin_object_size(&c->bs[0], 1); // CIR: cir.objsize min nullunknown %{{.+}} : !cir.ptr<!void> -> !u64i // LLVM: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 true, i1 true, i1 false) - // OGCG: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 true, i1 true, i1 false) gi = __builtin_object_size(&c->bs[0], 2); // CIR: cir.const #cir.int<16> // LLVM: store i32 16 - // OGCG: store i32 16 gi = __builtin_object_size(&c->bs[0], 3); // NYI: DerivedToBase cast @@ -78,7 +66,6 @@ void test2() { // CIR: cir.const #cir.int<16> // LLVM: store i32 16 - // OGCG: store i32 16 gi = __builtin_object_size((A*)&c->bs[0], 1); // NYI: DerivedToBase cast @@ -86,23 +73,18 @@ void test2() { // CIR: cir.const #cir.int<16> // LLVM: store i32 16 - // OGCG: store i32 16 gi = __builtin_object_size((A*)&c->bs[0], 3); // CIR: cir.objsize max nullunknown %{{.+}} : !cir.ptr<!void> -> !u64i // LLVM: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 false, i1 true, i1 false) - // OGCG: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 false, i1 true, i1 false) gi = __builtin_object_size(&c->bs[0].buf[0], 0); // CIR: cir.const #cir.int<16> // LLVM: store i32 16 - // OGCG: store i32 16 gi = __builtin_object_size(&c->bs[0].buf[0], 1); // CIR: cir.objsize min nullunknown %{{.+}} : !cir.ptr<!void> -> !u64i // LLVM: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 true, i1 true, i1 false) - // OGCG: call i64 @llvm.objectsize.i64.p0(ptr %{{.*}}, i1 true, i1 true, i1 false) gi = __builtin_object_size(&c->bs[0].buf[0], 2); // CIR: cir.const #cir.int<16> // LLVM: store i32 16 - // OGCG: store i32 16 gi = __builtin_ob... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/196224 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
