================ @@ -0,0 +1,24 @@ +//===-- RISCVInstrInfoSmip.td ------------------------------*- tablegen -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +let mayLoad = 1, Uses = [X2], Defs = [X2, X10, X11, X12, X13, X14, X15], + isBarrier = 1, isReturn = 1, isTerminator = 1 in { +let Predicates = [HasStdExtSmip] in +def MIPOPRET : Priv<"mipopret", 0b0011000>, Sched<[]> { ---------------- zeyi2 wrote:
The encodings come from the [mipopret](https://github.com/riscv/riscv-fast-interrupt/blob/6164eca8c8c9138e519ea3b8510655b2b5bb76d0/src/aclic.adoc?plain=1#L2049-L2059) and [sipopret](https://github.com/riscv/riscv-fast-interrupt/blob/6164eca8c8c9138e519ea3b8510655b2b5bb76d0/src/aclic.adoc?plain=1#L2102-L2112) diagrams: ``` funct7 rs2 rs1 funct3 rd opcode mipopret 0011000 01000 00000 000 00000 1110011 sipopret 0001000 01000 00000 000 00000 1110011 ``` https://github.com/llvm/llvm-project/pull/215095 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
