Hi Joe, Your reply is so full of misunderstanding that I can not resist the temptation to answer, although it is Declan's affair. > > I don't know what you're reading but I think you are thorooughly > confused.
In my opinion you are thouroughly confused because you have a totally different idea in your mind than what is talking about. Communication is a proces which can easily go wrong! >You should not have to guard the inputs to TTL logic. They > require enough drive that they will not switch unles you have a VERY strong > RF field. The subject is not dealing with EMC! What is aimed is a chiptest of in circuit chips, independant of the existing connections to other chips and that with making as less as possible temporarily changes on the board. Declan explained that guarding in this context is separating a chip under test from the logic levels of other chips which are connected to it. > I suspect that you're reading some kind of test station document > that was written for a machine that test CMOS ICs, or other special purpose > ICs that have a FET inputs that can switch from low intensity fields. In > any case, unless you are missing part of your device, it should NOT have > any unconnected inputs so guarding should never be a problem. I think you > need to forget guarding and just go back to digital troubleshooting. I > don't know how much you know about this stuff so you may already know all > this but almost all TTL uses a totem pole output. That means that it has > two transistors in series and the output is taken from their common > connection. The top transistor is tied to V+ and applies +5V to the output > when it's turned on. The lower transistor is tied to ground and it applies > 0V to the output when it's turned on. Logic in the circuit insures that > only one of them is turned on at a time or else they would short power to > ground and burn up both transistors. (FWIW there is a momentary short as > they switch. That's what causes TTL to draw so much power as it switches > and why every IC really should have an individual de-coupling capacitor.) > The inputs on TTL ships are high impedence and they normally will sense a > logic one if there is nothing connected to them. They can be connected > directly to 5 V or ground without a current limiting resistor. Input that > are not connected to anything else can force it high or low by tiying them > directly to ground or Vcc with no problems. However if the input is > connected to another gate and you force it hig or low you will be shorting > out one of the output transistors in the previous gate and release it's > magic smoke. From your first message it sounds like that's what you were > doing when you tied the reset to ground. > > As far as reset is concerned, many (most? all?) CPU's and LSI IC's > outputs will go into a high Z state when they are held reset. (Most designs > don't hold the CPU in a reset mode for more than a moment). Once you > release the reset the CPU should start placing address on the address bus > and start fetching data and executing it. In modern designs all of the ICs > on the bus have a tri-state output. That is they can have a high or low > output when the IC is enabled or their output will be a high Z if the IC is > not enabled hence 3 states. That's what permits you to hang a lot of ICs > off of the common bus. The address decoder logic should ensure that only > one of the ICs is enabled at a time. The rest of them just sit there and > don't affect the bus. If more than one was enabled then they would short > each other out via the bus. There is one common exception to this and that > is open-collector ICs. They only have one output transistor and it's > connected to ground. Therefore their output will be 0 or high impedence > only. But the outputs of these aren't usually connected to a bus. I would > say that they're NEVER connected to a bus but there probably are exceptions > somewhere. Ordinarily these are used for drivers to drive lamps, relays > and such. One of the common features of both standard and open collector > ICs is that they can sink more power than they can source. In other words > an IC might be able to supply 2Ma of power but it can ground 10 Ma. > Therefore most lamps, relays, etc are connected to Vcc and the IC supplies > the ground instead of connecting the device between the output and ground. > That's why every non-totem pole output gate that I know of only has the > lower transistor that connects to ground and not the upper one that would > connect to Vcc. > > Does this make sense? If you can tell me more about what you're testing > I can give you some suggestions about what to look for. > > More below. > > > At 01:48 AM 7/2/04 -0800, you wrote: > >Joe R. wrote: > > > >>At 09:09 AM 6/30/04 -0800, you wrote: > >> > >> > >>>Hello All, > >>> > >>>Will someone with a little testing savvy explain the basics of guarding > >>>to me. Let me > >>>give you an example. This board is populated with 74HC, which is not > >>>good stuff to > >>>short high or low, as it is driven both ways. > >>> > >>> > >> Most TTL is driven both ways. > >> > >> > >> > >Oh I see. But the high drive is surely limited in some way - there's no > >current behind it. > > > Nope, it's only limited by the upper output transistor's (and bond wires) and a build in series resistor to make it short circuit proof. > current carrying capacity. That's why it's easy to smoke them. BTW there's > also no current limiting in the lower transistor so it can be easily > damaged too. > > > > > > > >> The databus has eprom, > >> > >> > >>>cpu, & 3 support > >>>chips with /CE going to a 74HC138. That device I desoldered, and the > >>>Eprom was pulled, > >>>to test the support chips. > >>>/RESET on the cpu is driven from a watchdog chip, via a 74HC4049 > >>>/STDBY is wedded to +5V, and things fail. I grounded the /RESET anyhow > >>>and what I'm getting > >>>is a fail like "H(or L) expected - Z received" from every output pin. > >>> > >>> > >> > >> It may be normal for the device to go into a Tristate (high Z) mode when > >>it is reset. I said WHEN it's reset not afterwards. As long as you're > >>keeping RESET grounded then this is probably normal. You'd have to look at > >>the data sheet to tell for sure. FWIW I've found that the same device made > >>by different manufacturers doesn't always behave them same during reset so > >>you need to look at the actual manufacturer's data sheet if possible. (I > >>found this out the hard way with 555 timers made by Signetics). BTW did > >>you disconnect the logic that drives RESET? It may not like it's output > >>being forced to ground. > >> > >> > >I went away. I have to keep work flowing through, with or without this > >new toy. > > > > > Exactly what do you mean "opens tests"? Under what conditions > >(clockpresent, RESET state, etc). > > > When you say OPENS do you mean that it's high Z > > > >>and not logic 0 or 1? > >> > >> > >> > >/looks it up. > >An opens test is for input pins. If inputs won't switch, the truth table > >is modified accordingly, > >and the bit of the chip that isn't being used isn't tested. > > What? Are you trying to create a truth table? You should already have a > truth table for the IC in question and be comparing it to your ICs > characteristics. You should not be modifing the truth table. The IC > either matches it or it's bad, It's that simple. I suppose the tester measures the real truthtable of the chip so you can compare it with the spec's in order to know whether the chip is good or bad. > > > > >Guarding is the only name these guys gave the technique of protecting a > >chip test from > >unwanted influence from other chips. > > TTL is designed such that it should be immune from signals from > surrounding ICs. This part sounds like it was written for testing CMOS or > other ICs that have very high impedence (sensative) inputs. Their use of > guarding is correct for their purposes but it simply whould not be a factor > in what you are doing. But I need to know more about what your device is > and what kind of ICs are in it to say for certain. I don't think I've ever > seen a logic IC that required gaurding. (CMOS does need all of it's input > grounded or connected to something but that's not the same as guarding.) > Ordinary the only place that you find guarding is in RF circuits or > circuits using Op-Amps. CMOS ICs *CAN* be trigered by stray signals but > only if their inputs are left unconnected and that should never be done. > One of the first things that the manuacturer's tell you is to connect all > of the inputs to something. If the state of it's associated output doesn't > matter then you can tie the input to ground, Vcc or to another gate. Even > if the output desn't matter, one of the reasons that you connect the input > is to keep the IC from oscillating (switching off and on very rapidly). For > the most part CMOS only draws power when it switchs but if you get one > oscillating it can draw a LOT of power! That's actually a well known > problem in the HP 41 calculators. They can get into a glitch mode and the > circuitry starts running uncontrolably and it can EAT batteries. In high > static conditions some people even had to resort to keeping their HP-41s in > anti-static bags to prevent this from happening. > > > Joe > > > I don't know why they used a name > >that was > >already around meaning something else. Lack of Imagination? > > > > > > > >-- > >Author: Declan Moriarty > > INET: [EMAIL PROTECTED] > > > >Fat City Hosting, San Diego, California -- http://www.fatcity.com > >--------------------------------------------------------------------- > >To REMOVE yourself from this mailing list, send an E-Mail message > >to: [EMAIL PROTECTED] (note EXACT spelling of 'ListGuru') and in > >the message BODY, include a line containing: UNSUB CHIPDIR-L > >(or the name of mailing list you want to be removed from). You may > >also send the HELP command for other information (like subscribing). > > > -- > Author: Joe R. > INET: [EMAIL PROTECTED] > > Fat City Hosting, San Diego, California -- http://www.fatcity.com > --------------------------------------------------------------------- > To REMOVE yourself from this mailing list, send an E-Mail message > to: [EMAIL PROTECTED] (note EXACT spelling of 'ListGuru') and in > the message BODY, include a line containing: UNSUB CHIPDIR-L > (or the name of mailing list you want to be removed from). You may > also send the HELP command for other information (like subscribing). > -- Author: H.C. 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