> > Interesting your distinction because Cisco says that the 4451: > > "The product???s innovative hardware design splits the control and data > > planes between two multi-core CPUs??? > > Indeed, that's where my definition would not trivially apply either way :-) > > (And given how fast multipurpose CPUs have become, we see this in other > areas as well - like "SSL offloading PCI boards" that you could add to > a web server for decent HTTPS performance... most of that has just plain > disappeared with modern CPUs...)
For me the relevant question is often: Can the box handle line rate, or close to it, with minimum sized packets (and any access lists, services, QoS etc that you need)? If it can, great - otherwise you're opening yourself to a DoS attack at some point. Steinar Haug, Nethelp consulting, sth...@nethelp.no _______________________________________________ cisco-nsp mailing list cisco-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
