On 2/Dec/16 23:35, Sukumar Subburayan (sukumars) wrote:
> Hi Simon, > > WE have investigated this issue (I work for INSBU Engineering that designed > these ASICs), and the issue is not an ASIC bug, but a wrong flag set by SW, > which will be fixed. > I will re-open the bug and we will get it resolved. We will reach out to you > through the TAC and account team offline to resolve this ASAP using > workaround > , until the fixed SW is available. If needed, we can make an RPM patch > available for you. This is good to hear. I would have really been surprised if this was a limitation in custom silicon. Mark. _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
