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commit e794fbfa929308c182a702be7d237f2a8e6850a3 Author: raiden00pl <[email protected]> AuthorDate: Tue Nov 3 09:57:29 2026 +0100 boards/nucleo-wb55rg: Define the LPTIM kernel clocks. LPTIM1-2 run on PCLK1, the reset value of the RCC_CCIPR LPTIM source selections. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: raiden00pl <[email protected]> --- boards/arm/stm32wb/nucleo-wb55rg/include/nucleo-wb55rg.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/boards/arm/stm32wb/nucleo-wb55rg/include/nucleo-wb55rg.h b/boards/arm/stm32wb/nucleo-wb55rg/include/nucleo-wb55rg.h index ba963abafa8..fd19388728a 100644 --- a/boards/arm/stm32wb/nucleo-wb55rg/include/nucleo-wb55rg.h +++ b/boards/arm/stm32wb/nucleo-wb55rg/include/nucleo-wb55rg.h @@ -222,6 +222,11 @@ #define STM32_TIM16_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_TIM17_CLKIN (STM32_PCLK2_FREQUENCY) +/* LPTIM kernel clocks (RCC_CCIPR LPTIMxSEL reset values): PCLK1 */ + +#define STM32_LPTIM1_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_LPTIM2_CLKIN (STM32_PCLK1_FREQUENCY) + /* Higher SYSCLK requires more flash wait states. */ #define BOARD_FLASH_WAITSTATES 3
