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commit b22bee2b4e8d95b57cfe13a2ed31779db9d3cb5b Author: raiden00pl <[email protected]> AuthorDate: Fri Oct 30 13:18:49 2026 +0100 boards/nucleo-l073rz: Define the LPTIM1 kernel clock. LPTIM1 runs on the APB clock (PCLK1), the reset value of the RCC_CCIPR LPTIM1 source selection. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- boards/arm/stm32l0/nucleo-l073rz/include/board.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/boards/arm/stm32l0/nucleo-l073rz/include/board.h b/boards/arm/stm32l0/nucleo-l073rz/include/board.h index d7a3b028283..678d7bc3bad 100644 --- a/boards/arm/stm32l0/nucleo-l073rz/include/board.h +++ b/boards/arm/stm32l0/nucleo-l073rz/include/board.h @@ -93,6 +93,10 @@ #define STM32_TIM6_CLKIN (2 * STM32_PCLK1_FREQUENCY) #define STM32_TIM7_CLKIN (2 * STM32_PCLK1_FREQUENCY) +/* LPTIM kernel clock (RCC_CCIPR LPTIM1SEL reset value): APB (PCLK1) */ + +#define STM32_LPTIM1_CLKIN STM32_PCLK1_FREQUENCY + /* 48MHz clock configuration */ #if defined(CONFIG_STM32_USB) || defined(CONFIG_STM32_RNG)
