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commit d3ac12cd41e203fc8cd91dc85040e5ddf726bc5c Author: raiden00pl <[email protected]> AuthorDate: Tue Nov 3 09:57:28 2026 +0100 boards/nucleo-g431kb: Define the LPTIM1 kernel clock. LPTIM1 runs on PCLK1, the reset value of RCC_CCIPR LPTIM1SEL. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: raiden00pl <[email protected]> --- boards/arm/stm32g4/nucleo-g431kb/include/board.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/boards/arm/stm32g4/nucleo-g431kb/include/board.h b/boards/arm/stm32g4/nucleo-g431kb/include/board.h index d34cba08f59..dea43d031d0 100644 --- a/boards/arm/stm32g4/nucleo-g431kb/include/board.h +++ b/boards/arm/stm32g4/nucleo-g431kb/include/board.h @@ -153,6 +153,10 @@ #define STM32_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) #define STM32_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +/* LPTIM1 kernel clock is PCLK1 (RCC_CCIPR LPTIM1SEL reset value) */ + +#define STM32_LPTIM1_CLKIN (STM32_PCLK1_FREQUENCY) + /* USB divider -- Divide PLL clock by 1.5 */ #define STM32_CFGR_USBPRE 0
