This is an automated email from the ASF dual-hosted git repository. xiaoxiang781216 pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 5568fee627aae56e8caf5d9feda92146408780db Author: raiden00pl <[email protected]> AuthorDate: Tue Nov 3 09:57:28 2026 +0100 boards/nucleo-g0b1re: Define the LPTIM kernel clocks. LPTIM1-2 run on PCLK, the reset value of the RCC_CCIPR LPTIM source selections. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: raiden00pl <[email protected]> --- boards/arm/stm32g0/nucleo-g0b1re/include/board.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/boards/arm/stm32g0/nucleo-g0b1re/include/board.h b/boards/arm/stm32g0/nucleo-g0b1re/include/board.h index e97b9491cfc..c3bf2a6ea68 100644 --- a/boards/arm/stm32g0/nucleo-g0b1re/include/board.h +++ b/boards/arm/stm32g0/nucleo-g0b1re/include/board.h @@ -140,6 +140,11 @@ #define STM32_TIM16_CLKIN (2 * STM32_PCLK1_FREQUENCY) #define STM32_TIM17_CLKIN (2 * STM32_PCLK1_FREQUENCY) +/* LPTIM kernel clocks (RCC_CCIPR LPTIMxSEL reset values): PCLK */ + +#define STM32_LPTIM1_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_LPTIM2_CLKIN STM32_PCLK1_FREQUENCY + /* ADC1 clock prescaled is SYSCLK (64MHz) / 2 = 32MHz */ #define STM32_ADC_CLK_FREQUENCY STM32_SYSCLK_FREQUENCY
