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commit a9315afe967dc632f66765d7cfcd9b55adf83c4a Author: raiden00pl <[email protected]> AuthorDate: Mon Nov 9 08:32:28 2026 +0100 boards/stm32n6570-dk: Fix the clock comments and the button macros. Drop the ST reference wording from the clock description, and remove the IRQ button macros that did not match the two buttons. Assisted-by: Claude:claude-fable-5-1 Signed-off-by: raiden00pl <[email protected]> --- .../platforms/arm/stm32n6/boards/stm32n6570-dk/index.rst | 6 +++--- boards/arm/stm32n6/stm32n6570-dk/include/board.h | 8 ++++---- boards/arm/stm32n6/stm32n6570-dk/src/stm32n6570-dk.h | 6 +----- 3 files changed, 8 insertions(+), 12 deletions(-) diff --git a/Documentation/platforms/arm/stm32n6/boards/stm32n6570-dk/index.rst b/Documentation/platforms/arm/stm32n6/boards/stm32n6570-dk/index.rst index 67a06eea42c..1bd8065e63e 100644 --- a/Documentation/platforms/arm/stm32n6/boards/stm32n6570-dk/index.rst +++ b/Documentation/platforms/arm/stm32n6/boards/stm32n6570-dk/index.rst @@ -111,7 +111,7 @@ USER1 PC13 Button B2, EXTI13, high when pressed TAMP PE0 Button B4, EXTI0, high when pressed ===== ===== ====================================== -The LEDs are available through ``/dev/userleds`` and the button through +The LEDs are available through ``/dev/userleds`` and the buttons through ``/dev/buttons`` in the nsh configuration. Clocking @@ -121,8 +121,8 @@ By default the CPU runs at 800 MHz and the system buses at 400 MHz. PLL1 is fed from the 48 MHz HSE crystal, HCLK and the APB clocks run at 200 MHz and the timer kernel clock is 200 MHz. 800 MHz requires the VOS high voltage range, so the board SMPS is switched to its overdrive output through PF4 -before the PLL is started. PLL2, PLL3 and PLL4 are started with the ST -reference settings for the peripheral kernel clocks. +before the PLL is started. PLL2, PLL3 and PLL4 are started for the +peripheral kernel clocks. ``CONFIG_STM32N6570_DK_CLOCK_HSI`` selects a conservative tree instead: PLL1 from the internal 64 MHz HSI, CPU 200 MHz, SYSCLK 100 MHz and VOS low. The diff --git a/boards/arm/stm32n6/stm32n6570-dk/include/board.h b/boards/arm/stm32n6/stm32n6570-dk/include/board.h index a709905981d..7a11400bd18 100644 --- a/boards/arm/stm32n6/stm32n6570-dk/include/board.h +++ b/boards/arm/stm32n6/stm32n6570-dk/include/board.h @@ -39,10 +39,10 @@ /* Clocking *****************************************************************/ /* Two clock trees are provided. The default runs the CPU at 800 MHz from - * the 48 MHz HSE crystal with VDDCORE overdrive, matching the ST reference - * configuration. CONFIG_STM32N6570_DK_CLOCK_HSI selects a conservative - * 200 MHz tree from the internal HSI that needs neither the HSE nor - * overdrive. See arch/arm/src/stm32n6/stm32n6xx_rcc.c for the macros. + * the 48 MHz HSE crystal with VDDCORE overdrive. + * CONFIG_STM32N6570_DK_CLOCK_HSI selects a conservative 200 MHz tree from + * the internal HSI that needs neither the HSE nor overdrive. See + * arch/arm/src/stm32n6/stm32n6xx_rcc.c for the macros. */ #define STM32_HSI_FREQUENCY 64000000ul diff --git a/boards/arm/stm32n6/stm32n6570-dk/src/stm32n6570-dk.h b/boards/arm/stm32n6/stm32n6570-dk/src/stm32n6570-dk.h index 1bd115eb681..0d012d11f00 100644 --- a/boards/arm/stm32n6/stm32n6570-dk/src/stm32n6570-dk.h +++ b/boards/arm/stm32n6/stm32n6570-dk/src/stm32n6570-dk.h @@ -54,17 +54,13 @@ * Public Data ****************************************************************************/ -/* USER1 button (B2) on PC13: active high, no external pull resistor */ +/* USER1 (B2) on PC13 and TAMP (B4) on PE0, high when pressed */ #define GPIO_BTN_USER (GPIO_INPUT | GPIO_PULLDOWN | GPIO_EXTI | \ GPIO_PORTC | GPIO_PIN13) #define GPIO_BTN_TAMP (GPIO_INPUT | GPIO_PULLDOWN | GPIO_EXTI | \ GPIO_PORTE | GPIO_PIN0) -#define MIN_IRQBUTTON BUTTON_USER -#define MAX_IRQBUTTON BUTTON_USER -#define NUM_IRQBUTTONS 1 - #ifndef __ASSEMBLY__ /****************************************************************************
