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commit cbe6b9056120c8c5fed59c10c2897afbbbd9c657 Author: raiden00pl <[email protected]> AuthorDate: Wed Nov 4 12:05:21 2026 +0100 arch/arm/stm32n6: Describe the boot comments in hardware terms. Drop the references to the vendor library in the start-up and RCC comments. Assisted-by: Claude:claude-fable-5-1 Signed-off-by: raiden00pl <[email protected]> --- arch/arm/src/stm32n6/stm32_start.c | 4 ++-- arch/arm/src/stm32n6/stm32n6xx_rcc.c | 7 +++---- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm/src/stm32n6/stm32_start.c b/arch/arm/src/stm32n6/stm32_start.c index a7eef38c55f..2102fbcace0 100644 --- a/arch/arm/src/stm32n6/stm32_start.c +++ b/arch/arm/src/stm32n6/stm32_start.c @@ -181,8 +181,8 @@ void __start_c(void) putreg32((uint32_t)_vectors, NVIC_VECTAB); - /* When chain-loaded by an FSBL that called HAL_Init(), SysTick may be - * left running. Disable it and clear any pending interrupt so it does + /* When chain-loaded by a first-stage boot loader, SysTick may be left + * running. Disable it and clear any pending interrupt so it does * not fire before NuttX has attached its handler. */ diff --git a/arch/arm/src/stm32n6/stm32n6xx_rcc.c b/arch/arm/src/stm32n6/stm32n6xx_rcc.c index 18d9685263d..3cfe867d2fc 100644 --- a/arch/arm/src/stm32n6/stm32n6xx_rcc.c +++ b/arch/arm/src/stm32n6/stm32n6xx_rcc.c @@ -315,7 +315,6 @@ static inline void rcc_enableahb4(void) { /* Use the write-1-to-set ENSR alias rather than a read-modify-write on * ENR so concurrent producers (e.g. RCC IRQ later) cannot lose bits. - * Matches the ST LL pattern in stm32n6xx_ll_bus.h. */ putreg32(RCC_AHB4ENR_GPIOAEN @@ -722,9 +721,9 @@ void stm32_rcc_enableperipherals(void) /* Enable all AXISRAM bank clocks. The boot ROM only enables AXISRAM1/2 * which is sufficient for code execution, but the NuttX heap extends - * across all SRAM banks (up to AXISRAM5 at 0x34400000+). Without these - * clocks, mm_initialize writing the tail node at the heap end will cause - * an IMPRECISERR bus fault. + * across AXISRAM1-6 and the CACHEAXI RAM. Without these clocks, + * mm_initialize writing the tail node at the heap end will cause an + * IMPRECISERR bus fault. */ putreg32(RCC_MEMENR_ALLAXISRAM | RCC_MEMENR_CACHEAXIRAMEN,
