DickJC123 commented on a change in pull request #13749: Add NHWC layout support
to Pooling (cpu, gpu cuda, gpu cuDNN)
URL: https://github.com/apache/incubator-mxnet/pull/13749#discussion_r253203627
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File path: src/operator/nn/pool_utils.h
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@@ -98,14 +98,16 @@ struct lp_grad<DType, 1> {
template<typename DType>
struct lp_grad<DType, 2> {
static MSHADOW_XINLINE DType Map(const DType grad, const DType in_data,
const DType out_data) {
- return grad * in_data / out_data;
+ // Avoid nan result if both grad and out_data are 0.
+ return (grad == DType(0.0)) ? DType(0.0) : grad * in_data / out_data;
}
};
template<typename DType>
struct lp_grad<DType, 3> {
static MSHADOW_XINLINE DType Map(const DType grad, const DType in_data,
const DType out_data) {
- return grad * in_data * in_data / (out_data * out_data);
+ // Avoid nan result if both grad and out_data are 0.
+ return (grad == DType(0.0)) ? DType(0.0) : grad * in_data * in_data /
(out_data * out_data);
Review comment:
I introduced this to quiet some nans that were causing test failures. I'm
reviewing the specifics to see if a better solution exists as suggested in your
comment, so stay tuned.
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