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commit bc4a322960ca0d0ee0476319d9f0dbc569298205
Author: Jerzy Kasenberg <jerzy.kasenb...@codecoup.pl>
AuthorDate: Thu Mar 18 13:18:00 2021 +0100

    mcu/nrf5340: Update system_nrf5340.c to nrfx 2.4
    
    Newt changes from NRFX 2.4 migrated to mynewt version
    of system_nrf5340.c file.
---
 hw/mcu/nordic/nrf5340/src/system_nrf5340.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/hw/mcu/nordic/nrf5340/src/system_nrf5340.c 
b/hw/mcu/nordic/nrf5340/src/system_nrf5340.c
index 1b68288..73cb205 100644
--- a/hw/mcu/nordic/nrf5340/src/system_nrf5340.c
+++ b/hw/mcu/nordic/nrf5340/src/system_nrf5340.c
@@ -1,6 +1,6 @@
 /*
 
-Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+Copyright (c) 2009-2020 ARM Limited. All rights reserved.
 
     SPDX-License-Identifier: Apache-2.0
 
@@ -29,6 +29,7 @@ NOTICE: This file has been modified by Nordic Semiconductor 
ASA.
 #include <nrf_erratas.h>
 #include <system_nrf5340_application.h>
 #include <mcu/cmsis_nvic.h>
+#include "system_nrf53_approtect.h"
 
 /*lint ++flb "Enter library region" */
 
@@ -78,6 +79,18 @@ void SystemInit(void)
           SAU->CTRL |= (1 << SAU_CTRL_ALLNS_Pos);
         #endif
 
+        /* Workaround for Errata 97 "ERASEPROTECT, APPROTECT, or startup 
problems" found at the Errata document
+           for your device located at 
https://infocenter.nordicsemi.com/index.jsp  */
+        if (nrf53_errata_97())
+        {
+            if (*((volatile uint32_t *)0x50004A20ul) == 0)
+            {
+                *((volatile uint32_t *)0x50004A20ul) = 0xDul;
+                *((volatile uint32_t *)0x5000491Cul) = 0x1ul;
+                *((volatile uint32_t *)0x5000491Cul) = 0x0ul;
+            }
+        }
+
         /* Trimming of the device. Copy all the trimming values from FICR into 
the target addresses. Trim
          until one ADDR is not initialized. */
         uint32_t index = 0;
@@ -217,6 +230,10 @@ void SystemInit(void)
         /* Allow Non-Secure code to run FPU instructions.
          * If only the secure code should control FPU power state these 
registers should be configured accordingly in the secure application code. */
         SCB->NSACR |= (3UL << 10);
+
+        /* Handle fw-branch APPROTECT setup. */
+        nrf53_handle_approtect();
+
     #endif
 
     /* Enable the FPU if the compiler used floating point unit instructions. 
__FPU_USED is a MACRO defined by the

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