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commit 8825d0b7374371438e5a0723a1a92e3f19201d34
Author: Jerzy Kasenberg <jerzy.kasenb...@codecoup.pl>
AuthorDate: Thu Mar 18 13:22:30 2021 +0100
mcu/nrf5340: Add HFCLK192M divider initialization
Default divider of 192M clock is 4 resulting in 48MHz clock.
For QSPI it means 24MHz maximum clock.
To run QSPI with higher clock, divider has to be 1 or 2.
This adds syscfg value to set 192M clock divider.
---
hw/mcu/nordic/nrf5340/src/hal_system.c | 7 +++++++
hw/mcu/nordic/nrf5340/syscfg.yml | 6 ++++++
2 files changed, 13 insertions(+)
diff --git a/hw/mcu/nordic/nrf5340/src/hal_system.c
b/hw/mcu/nordic/nrf5340/src/hal_system.c
index 5db31af..59ca458 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_system.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_system.c
@@ -126,4 +126,11 @@ hal_system_clock_start(void)
}
}
#endif
+ if (MYNEWT_VAL(MCU_HFCLCK192_DIV) == 1) {
+ NRF_CLOCK_S->HFCLK192MCTRL = 0;
+ } else if (MYNEWT_VAL(MCU_HFCLCK192_DIV) == 2) {
+ NRF_CLOCK_S->HFCLK192MCTRL = 1;
+ } else if (MYNEWT_VAL(MCU_HFCLCK192_DIV) == 4) {
+ NRF_CLOCK_S->HFCLK192MCTRL = 2;
+ }
}
diff --git a/hw/mcu/nordic/nrf5340/syscfg.yml b/hw/mcu/nordic/nrf5340/syscfg.yml
index 7d89455..8607b22 100644
--- a/hw/mcu/nordic/nrf5340/syscfg.yml
+++ b/hw/mcu/nordic/nrf5340/syscfg.yml
@@ -53,6 +53,12 @@ syscfg.defs:
When enabled, asm(bkpt) will be ignored. If not set, it will hit
the breakpoint wherever it gets called, For example, reset and
crash
value: 0
+ MCU_HFCLCK192_DIV:
+ description: >
+ Divider of 192MHz clock that is used for QSPI.
+ Default value 4, clock runs at 48MHz.
+ range: 1,2,4
+ value: 4
# MCU peripherals definitions
ADC_0:
