lupyuen commented on code in PR #12178:
URL: https://github.com/apache/nuttx/pull/12178#discussion_r1573735180
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arch/risc-v/src/qemu-rv/qemu_rv_exception_m.S:
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Review Comment:
Question: Why is __trap_vec_m no longer needed?
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arch/risc-v/src/qemu-rv/qemu_rv_start.c:
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Review Comment:
Thanks for Refactoring the Start Code for QEMU Kernel Mode. Let's do a
Regression Test to verify that QEMU Flat Mode is OK: rv-virt:nsh and
rv-virt:nsh64
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arch/risc-v/src/common/riscv_macros.S:
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Review Comment:
Explanation: Previously we set the Stack in
`arch/risc-v/src/<arch>/<arch>_head.S`. Now we refactored the code into a
common function: `riscv_set_inital_sp`
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Documentation/platforms/risc-v/qemu-rv/boards/rv-virt/index.rst:
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@@ -65,6 +65,8 @@ And, for 64-bit configurations::
$ qemu-system-riscv64 -semihosting -M virt,aclint=on -cpu rv64 -smp 8
-bios none -kernel nuttx -nographic
+If test with kernel build, remove `-bios none` options. Kernel build require
Review Comment:
Let's change to
```text
If testing with kernel build, remove the ``-bios none`` option. Kernel build
requires
SBI to function properly.
```
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arch/risc-v/src/common/riscv_mtimer.c:
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Review Comment:
Explanation: With [RISC-V "Sstc" Extension for Supervisor-Mode Timer
Interrupts](https://github.com/riscv/riscv-isa-manual/blob/444609cbe3e8a736628e9d11831bb88a42e6dba1/src/sstc.adoc),
we can now set Timer Interrupts by writing to Supervisor-Level `stimecmp` CSR.
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arch/risc-v/Kconfig:
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Review Comment:
To help other devs: I'm adding Review Notes to explain the changes for SSTC
Extension, IPI Send / Clear and Dynamic Stack Allocation. If my understanding
is incorrect, please lemme know thanks!
Explanation: `ARCH_RV_EXT_SSTC` will enable support for [RISC-V "Sstc"
Extension for Supervisor-Mode Timer
Interrupts](https://github.com/riscv/riscv-isa-manual/blob/444609cbe3e8a736628e9d11831bb88a42e6dba1/src/sstc.adoc).
This extension adds the Supervisor-Level `stimecmp` CSR. Enable / disable bits
for this extension are provided in the new `menvcfg` CSR.
Why is SSTC needed? Without SSTC: Supervisor Mode will need to set the
System Timer [by calling
SBI](https://lupyuen.github.io/articles/sbi#set-a-system-timer). With SSTC:
Supervisor Mode can now set the System Timer by writing to `stimecmp` CSR.
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