inochisa commented on code in PR #12178: URL: https://github.com/apache/nuttx/pull/12178#discussion_r1581998302
########## arch/risc-v/src/common/riscv_macros.S: ########## @@ -364,3 +364,45 @@ csrr \out, CSR_MHARTID #endif .endm + +/**************************************************************************** + * Name: riscv_set_inital_sp + * + * Description: + * Set inital sp for riscv core. This function should be only called + * when initing. + * + * sp (stack top) = sp base + idle stack size * hart id + * sp (stack base) = sp (stack top) + idle stack size * - XCPTCONTEXT_SIZE + * + * Note: The XCPTCONTEXT_SIZE byte after stack base is reserved for + * up_initial_state since we are already running and using + * the per CPU idle stack. + * + * TODO: Support non-zero boot hart. + * + * Parameter: + * base - Pointer to where the stack is allocated (e.g. _ebss) + * size - Stack size for pre cpu to allocate + * size - Hart id register of this hart (Usually a0) + * + ****************************************************************************/ +.macro riscv_set_inital_sp base, size, hartid + la t0, \base + li t1, \size + mul t1, \hartid, t1 + add t0, t0, t1 + + /* ensure the last XCPTCONTEXT_SIZE is reserved for non boot CPU */ + + bnez \hartid, 998f Review Comment: I have seen up_initial_state reserve something, It just return after setting the idle stack. Do I miss somthing? And skip calling riscv_set_inital_sp is not a good idea, this means chip always need to set it manually, which is weird. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
